Merge of content from both Resource Management and Computer Architecture
What is true color
Maximizing the 24 slots of hex bits available
(11010110) base 2 → hexadecimal
D6
1001101 (base 2) → base 16
4D
11001 (base 2) → decimal
25
ALU
Arithmetic Logic Unit, used for handling arithmetic operations and basic input/output logic operations
ASCII
A character set which involves all Latin letters
Batch processing
Programs are grouped together based on dependencies then executed sequentially
Pros and Cons of interrupt
Less resource intensive but less optimal because of Latency
Pros and Cons of polling
Optimal behavior but resource intensive
Pros of Multi-Threading
Faster, efficient in relation to using a single cpu/single core system
Broad Types of Secondary Storage
Direct access [HDD/SSID] and Sequential access
Burst Time
CPU time occupied by process without waiting for input/output
Cache
Holds the information from the RAM that is most actively used and accessed most frequently. Most relevant types of cache rn are L1 and L2.
L1 is placed on the CPU and L2 is placed between the 10 and 20
CIR
Current Instruction Register: Stores the instruction currently being decoded
Client
the person/institution funding the product
Compaction
a process where the memory manager rearranges the memory space to create larger blocks of contiguous memory. Excessive compaction can lead to checkerboaring
Converting 89 (base 10) to its equivalent Base 2 representation
01011001
Convert 101101 (base 2) to its equivalent BASE 16 representation
2D
Convert 75 (base 10) into hexadecimal
4F
CU
Control Unit, it’s what retrieves the instructions from the 10 and handles its execution
D-RAM
Dynamic Ram:
Cheaper
Requires constant refreshing to keep data useable
Data leaks
Memory capacity»
HL [DDR, double data rate, data is transferred at the rise and fall of the clock]
Deadlock
When two or more processes are blocked, needing to access shared resources in a specific order
decode
The instruction goes from the MDR to the CIR
CU decodes the instruction, sees whether or not it can pass
If it’s passable CU sends a decoded version to the ALU
Define CPU
The part of the computer that performs instructions based on input and output
Define Virtual Memory
It hides the complexities of functions. It’s the process of moving out idle applications from 10 to the 20 (temporarily) to make space for incoming applications. It’s returned to primary memory as needed and stored in units called pages.
Difference between ROM and RAM
ROM cannot be written to, RAM can
ROM holds the Basic [Input/Output] System, RAM holds the programs running and data used
ROM is much smaller than RAM
ROM is non-volatile, RAM is volatile
DRAM constantly leaks, so it requires constant?
refreshing
Excessive paging leads to
thrashing
Excessive swapping leads to
Fragmentation
Execute
ALU performs arithmetic or logical operation as instructed. The latest result is stored in the accumulator
Fetch
Program Counter (PC) sends address of the next instruction to Memory Address Register
Memory Address Bus (MAB) sends this address to the RAM
The memory unit uses the address to locate the instruction in RAM.
The instruction is fetched from RAM and placed on the Memory Data Bus (MDB).
The MDR captures the fetched instruction.
Hex
A numerical notation using base 16
How to convert Binary to Hex?
Make it the capacity of a byte (8 bits long), split it into 2, then use the table for conversion.
How to convert Decimal into Binary
Divide by two, note 1 for each odd number and note 0 for each even number. from bottom to top put together the string of binary.
How to convert Decimal into Hex
Convert to binary, then turn the binary into byte form and break it in half
How to convert Hex into Binary?
Each Hex number seperately, find each letter/number equivalent on the table, put them together
Interrupt
When the periphreal device issues an error/interrupt signal to the processor to signify change in status
Lossy Compression
Files will lose quality when it is compressed
MAC address
Standing for Media Access Control Address, it's a unqiue 12-character alphanumeric attribute that is used to identify individual electronic devices on a network. It's built in and cannot be removed (anymore)
MAR
Memory Address Register:
Stores the memory address from which data will be fetched
MDR
Memory Data Register: Holds the data fetched from during the cycle
Memory Leak
When an application is quit but the allocated memory is still being used
Memory Segmentation
Occurs in place of paging, when there isn’t a present block. Storage is dynamic but execessive swapping can lead to fragmentation. Also has cons such as:
Physical wear and tear
Less predictability
Non-contiguous
Multi-access
Allows for multiple users to use the same client [disk partition → uses authentication methods to identify users]
Multi-Level Queue [Without Feedback]
- Assigned priority and dependencies
- Children rely on parents to execute their tasks
- Because this version has no feedback, it will run without giving errors and can give indecipherable outputs
Multi-processing
Computer system has more than one core, so run across multiple cores
Multi-threading
A program is written in threads that can be executed in parallel
Multi-programming
every program is split into multiple tasks and these tasks are split into multiple cores
Cons of multi-threading
Threads can’t be dependent on the same resource - leads to deadlock
Paging [in virtual memory]
The transfer of data between primary and secondary memory, done in specific amounts at a time (pages, ex:- 20mB)
Parts of the CPU
ACC
ALU
CU
CIR
MDR
MDB
MAR
MAB
RAM
Peak theoretical bandwidth
achieved only under ideal conditions:
- no heat
- no obstruction
- no virtual memories
- no interrupts
Polling
Processor continuously (ie present frequency) checks the peripheral devices on their status
Processor Speed
Million instructions per second (MIPS)
Purpose of MAC address and NIC
NIC is responsible for the client connection to the WAN
Represent 78 (base 10) in its equivalent (base 16) format
4E
ROM
Non-volatile primary memory
Round Robin
CPU allocates / runs every job in a predetermined time slice, so basically splits the work of all the available into the same portions of tasks and does it at the same time. Ex. 4ms for all tasks, so it started with task 1, even if it's too much or not enough time.
Run Length Encoding
A method of compression that looks for repeating patterns and encodes them into one item of data of a specific length
Run Time
The time taken, alongside fetching/waiting and executing
S-RAM
Static RAM:
Does not leak
Super fast
Very expensive (Needs more transistors per byte)
Used usually for cache [which stores more frequently used applications]
L1 <- inside CPU
L2 <- between CPU and primary memory
Spool
Sequence of print jobs
Sustained memory bandwidth
Average bandwidth achieved across extraneous / all confounding variables when the CPU runs
Task Scheduling Algorithms
- First come first serve
- Shortest job first
- Round robin
- Multi-Level Feedback Queue
- Multi-Level Queue
The secondary memory and CPU are connected. True or False
False
Three states of a job in the CPU
Wait → Ready → Execute
Two types of compression algorithms
Lossy compression and lossless compression
Types of bandwidth
Peak theoretical bandwidth and sustained memory bandwidth
Unicode
An extension of ASCII that adds other languages support
What does core mean?
CPU or system
What does Unicode use to extend it’s predecessor?
It combines different letters to create new, longer ones. Goes to UTF-8, UTF-16, UTF-32
What is direct access (secondary memory)?
Data can be retrieved with indexed values
What is sequential access [secondary memory]
Data can only be retrieved by reading all data that was sequentially stored up until that point
What is the O/S responsible for, with regards to the IP and MAC
it's responsible for the IP and MAC addressing related to the client, whenever a connection/session is established
Where is the MAC address found?
The 12-digit hexadecimal code is found on a network interface card.
Real-time processing
Data processing performed on-the-fly in which the generated data influences the actual process taking place. For example” aircraft control
Online processing
Data processing performed by a single processor through the use of equipment that it controls. For example: airline reservation