Comp Sci - Topic 2 and 6

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What is true color

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Description and Tags

Merge of content from both Resource Management and Computer Architecture

77 Terms

1

What is true color

Maximizing the 24 slots of hex bits available

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2

(11010110) base 2 → hexadecimal

D6

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3

1001101 (base 2) → base 16

4D

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4

11001 (base 2) → decimal

25

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5

ALU

Arithmetic Logic Unit, used for handling arithmetic operations and basic input/output logic operations

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6

ASCII

A character set which involves all Latin letters

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7

Batch processing

Programs are grouped together based on dependencies then executed sequentially

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8

Pros and Cons of interrupt

Less resource intensive but less optimal because of Latency

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9

Pros and Cons of polling

Optimal behavior but resource intensive

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10

Pros of Multi-Threading

Faster, efficient in relation to using a single cpu/single core system

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11

Broad Types of Secondary Storage

Direct access [HDD/SSID] and Sequential access

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12

Burst Time

CPU time occupied by process without waiting for input/output

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13

Cache

Holds the information from the RAM that is most actively used and accessed most frequently. Most relevant types of cache rn are L1 and L2. 

L1 is placed on the CPU and L2 is placed between the 10 and 20

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CIR

Current Instruction Register: Stores the instruction currently being decoded

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Client

the person/institution funding the product

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16

Compaction

a process where the memory manager rearranges the memory space to create larger blocks of contiguous memory. Excessive compaction can lead to checkerboaring

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17

Converting 89 (base 10) to its equivalent Base 2 representation

01011001

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18

Convert 101101 (base 2) to its equivalent BASE 16 representation

2D

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19

Convert 75 (base 10) into hexadecimal

4F

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20

CU

Control Unit, it’s what retrieves the instructions from the 10 and handles its execution

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21

D-RAM

Dynamic Ram:

  • Cheaper

  • Requires constant refreshing to keep data useable

  • Data leaks

  • Memory capacity»

  • HL [DDR, double data rate, data is transferred at the rise and fall of the clock]

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Deadlock

When two or more processes are blocked, needing to access shared resources in a specific order

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23

decode

The instruction goes from the MDR to the CIR
CU decodes the instruction, sees whether or not it can pass
If it’s passable CU sends a decoded version to the ALU

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24

Define CPU

The part of the computer that performs instructions based on input and output

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25

Define Virtual Memory

It hides the complexities of functions. It’s the process of moving out idle applications from 10 to the 20 (temporarily) to make space for incoming applications. It’s returned to primary memory as needed and stored in units called pages.

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26

Difference between ROM and RAM

ROM cannot be written to, RAM can
ROM holds the Basic [Input/Output] System, RAM holds the programs running and data used
ROM is much smaller than RAM
ROM is non-volatile, RAM is volatile

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DRAM constantly leaks, so it requires constant?

refreshing

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Excessive paging leads to

thrashing

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29

Excessive swapping leads to

Fragmentation

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Execute

ALU performs arithmetic or logical operation as instructed. The latest result is stored in the accumulator

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Fetch

  • Program Counter (PC) sends address of the next instruction to Memory Address Register

  • Memory Address Bus (MAB) sends this address to the RAM

  • The memory unit uses the address to locate the instruction in RAM.

  • The instruction is fetched from RAM and placed on the Memory Data Bus (MDB).

  • The MDR captures the fetched instruction.

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Hex

A numerical notation using base 16

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How to convert Binary to Hex?

Make it the capacity of a byte (8 bits long), split it into 2, then use the table for conversion. 

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How to convert Decimal into Binary

Divide by two, note 1 for each odd number and note 0 for each even number. from bottom to top put together the string of binary.  

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35

How to convert Decimal into Hex

Convert to binary, then turn the binary into byte form and break it in half

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36

How to convert Hex into Binary?

Each Hex number seperately, find each letter/number equivalent on the table, put them together

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37

Interrupt

When the periphreal device issues an error/interrupt signal to the processor to signify change in status

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38

Lossy Compression

Files will lose quality when it is compressed

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39

MAC address

Standing for Media Access Control Address, it's a unqiue 12-character alphanumeric attribute that is used to identify individual electronic devices on a network. It's built in and cannot be removed (anymore)

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40

MAR

Memory Address Register:

Stores the memory address from which data will be fetched

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MDR

Memory Data Register: Holds the data fetched from during the cycle

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Memory Leak

When an application is quit but the allocated memory is still being used

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43

Memory Segmentation

Occurs in place of paging, when there isn’t a present block. Storage is dynamic but execessive swapping can lead to fragmentation. Also has cons such as:

  • Physical wear and tear

  • Less predictability

  • Non-contiguous

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Multi-access

Allows for multiple users to use the same client [disk partition → uses authentication methods to identify users]

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Multi-Level Queue [Without Feedback]

- Assigned priority and dependencies
- Children rely on parents to execute their tasks 
- Because this version has no feedback, it will run without giving errors and can give indecipherable outputs

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Multi-processing

Computer system has more than one core, so run across multiple cores

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Multi-threading

A program is written in threads that can be executed in parallel

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Multi-programming

every program is split into multiple tasks and these tasks are split into multiple cores

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Cons of multi-threading

Threads can’t be dependent on the same resource - leads to deadlock

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Paging [in virtual memory]

The transfer of data between primary and secondary memory, done in specific amounts at a time (pages, ex:- 20mB)

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51

Parts of the CPU

ACC
ALU
CU
CIR
MDR
MDB
MAR
MAB
RAM

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52

Peak theoretical bandwidth

achieved only under ideal conditions:
- no heat
- no obstruction
- no virtual memories
- no interrupts

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53

Polling

Processor continuously (ie present frequency) checks the peripheral devices on their status

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Processor Speed

Million instructions per second (MIPS)

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Purpose of MAC address and NIC

NIC is responsible for the client connection to the WAN

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56

Represent 78 (base 10) in its equivalent (base 16) format

4E

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57

ROM

Non-volatile primary memory

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58

Round Robin

CPU allocates / runs every job in a predetermined time slice, so basically splits the work of all the available into the same portions of tasks and does it at the same time. Ex. 4ms for all tasks, so it started with task 1, even if it's too much or not enough time. 

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59

Run Length Encoding

A method of compression that looks for repeating patterns and encodes them into one item of data of a specific length

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Run Time

The time taken, alongside fetching/waiting and executing

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61

S-RAM

Static RAM:

  • Does not leak

  • Super fast

  • Very expensive (Needs more transistors per byte)

  • Used usually for cache [which stores more frequently used applications]

    • L1 <- inside CPU

    • L2 <- between CPU and primary memory

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Spool

Sequence of print jobs

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Sustained memory bandwidth

Average bandwidth achieved across extraneous / all confounding variables when the CPU runs

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Task Scheduling Algorithms

- First come first serve
- Shortest job first
- Round robin
- Multi-Level Feedback Queue
- Multi-Level Queue

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65

The secondary memory and CPU are connected. True or False

False

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66

Three states of a job in the CPU

Wait → Ready → Execute

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67

Two types of compression algorithms

Lossy compression and lossless compression

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Types of bandwidth

Peak theoretical bandwidth and sustained memory bandwidth

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69

Unicode

An extension of ASCII that adds other languages support

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70

What does core mean?

CPU or system

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71

What does Unicode use to extend it’s predecessor?

It combines different letters to create new, longer ones. Goes to UTF-8, UTF-16, UTF-32

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72

What is direct access (secondary memory)?

Data can be retrieved with indexed values

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73

What is sequential access [secondary memory]

Data can only be retrieved by reading all data that was sequentially stored up until that point

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74

What is the O/S responsible for, with regards to the IP and MAC

it's responsible for the IP and MAC addressing related to the client, whenever a connection/session is established

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75

Where is the MAC address found?

The 12-digit hexadecimal code is found on a network interface card.

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76

Real-time processing

Data processing performed on-the-fly in which the generated data influences the actual process taking place. For example” aircraft control

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Online processing

Data processing performed by a single processor through the use of equipment that it controls. For example: airline reservation

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