CS8491 Computer Architecture - Unit II & Unit III Review Flashcards

A comprehensive set of questions and answers covering ALU structure, arithmetic operations, division, multiplication, floating point, subword parallelism, MIPS datapath, pipelining, hazards, and exception handling as presented in the lecture notes.

What is the Arithmetic Logic Unit (ALU) and what is its role in a CPU?

An ALU is a digital circuit that performs arithmetic and logic operations; it is the fundamental building block of the CPU; modern CPUs may have multiple ALUs or dedicated units for fixed-point and floating-point operations, and inputs/outputs typically flow over a bus.

What are the two subsections of the ALU and what do they do?

Arithmetic Section (performs add, subtract, multiply, divide) and Logic Section (performs comparing, selecting, matching, and merging data).

What does a machine instruction word typically contain?

An operation code (opcode), one or more operands, and sometimes a format code.

What does the operation code (opcode) tell the ALU?

The operation to perform; the operands are used in the operation; the format code may indicate fixed-point or floating-point instructions.

What is overflow in binary arithmetic?

Overflow occurs when there are insufficient bits in the representation to portray the result.

What is a Half Adder and what outputs does it produce?

A circuit that adds two single bits; outputs a SUM and a CARRY (SUM = XOR, CARRY = AND).

What distinguishes a Full Adder from a Half Adder?

A Full Adder has three inputs (A, B, Cin) and two outputs (S, COUT); it can be cascaded with other adders to build multi-bit adders.

How is an 8-bit adder built from full adders?

Eight 1-bit full adders are cascaded so each handles one bit, with carries propagating to the next adder.

How is subtraction performed using addition in an ALU design?

Subtract Y from X by adding X to the two's complement (invert Y and add 1) using an add/sub control signal.

How is a full adder constructed from two half adders?

First half adder adds A and B to produce S1 and C1; second half adder adds Cin to S1 to produce S and C2; Cout is the OR of C1 and C2.

Why are eight full adders required for an 8-bit addition?

To perform bit-parallel addition across all 8 bit positions, cascading one full adder per bit with carries propagating through the chain.

What is the basic approach to binary multiplication in hardware?

At each step, multiply the multiplicand by the current multiplier bit (0 or 1), accumulate partial sums, and shift; the final product has n+m bits where n and m are the operand sizes.

What are the main hardware components described for multiplication hardware?

32-bit Multiplier Register, 64-bit Multiplicand Register, 64-bit Product Register, 64-bit ALU, and a Control Test Mechanism.

How are signed multiplications handled in binary multiplication?

Convert to positive numbers, perform the multiplication, then adjust the sign of the result based on the original signs (negate if signs differ); extend the product as needed.

What is Booth’s algorithm used for in multiplication?

A procedure for multiplying binary integers in two’s complement form that reduces the number of additions/subtractions by recoding the multiplier.

What is the Booth recoding rule for multiplier bits i and i-1?

00 -> 0xM, 01 -> +1xM, 10 -> -1xM, 11 -> 0xM (where M is the multiplicand).

What is the basic relationship in division between dividend, divisor, quotient, and remainder?

Dividend = Quotient × Divisor + Remainder; remainder is less than the divisor (for nonnegative operands).

What are the main division hardware components listed?

Divisor Register (32-bit + sign), ALU (64-bit + sign), A Register (32-bit + sign), Q Register (32-bit).

What is Restoring Division?

A division algorithm using A and Q registers where the divisor is subtracted from A; if A becomes negative, it is restored; process repeats for all bits.

What is Non-Restoring Division?

A variation that avoids restoration by choosing A = A - D or A = A + D based on sign, continuing the process and correcting at the end.

What is Floating Point and why is it called floating point?

Floating point numbers represent real numbers with a mantissa and exponent; the binary point is not fixed, so values are stored in normalized scientific notation with a sign, exponent, and fraction.

How is a 32-bit floating-point number represented in the MIPS format described?

1 sign bit, 8-bit exponent, 23-bit fraction.

What distinguishes Single Precision from Double Precision floating point?

Single precision uses one 32-bit word; Double precision uses two 32-bit words (64 bits total) with extended exponent and fraction ranges.

What are FP overflow and underflow in floating point arithmetic?

Overflow occurs when the exponent is too large for the field; underflow occurs when the exponent is too small (negative) for the field.

What are the basic steps in floating point addition?

1) Align exponents by shifting the mantissas, 2) Add mantissas, 3) Normalize the result, 4) Round to the desired precision and check for overflow/underflow.

What are the basic steps in floating point multiplication?

1) Add the exponents (subtract the bias), 2) Multiply the mantissas, 3) Determine the sign, 4) Normalize and round if needed.

What are the basic steps in floating point division?

1) Subtract the exponents (add the bias), 2) Divide the mantissas, 3) Determine the sign, 4) Normalize and round if needed.

What is Subword Parallelism?

Packing multiple subwords inside a word and applying the same instruction to all subwords in parallel (a form of SIMD); examples include 128-bit words enabling multiple 8/16/32-bit adds.

Why is Subword Parallelism advantageous for media processing?

It exploits data parallelism on lower-precision data (e.g., graphics and audio), enabling efficient simultaneous subword operations.

What are the three classes of MIPS instructions mentioned?

Memory-reference (lw, sw), Arithmetic-logic (add, sub, AND, OR), Branch (beq, j).

What are the two initial steps to implement every MIPS instruction?

Fetch the instruction by sending the PC to memory and fetching it; Fetch the operands by reading the appropriate registers as dictated by the instruction fields.

What is the Datapath in a CPU?

The collection of registers, the ALU, and the interconnection bus (including MDR and MAR) that implement instruction execution.

What are the roles of the Program Counter (PC) and Instruction Register (IR)?

PC holds the address of the next instruction; IR holds the current instruction; after fetching, PC is typically incremented by 4.

What is the role of the MUX that selects between 4 and Y in the datapath?

It selects either the constant 4 (for PC increment) or the Y register content as input to the ALU for incrementing the PC.

What is the purpose of pipelining in processors?

To increase throughput by overlapping instruction fetch, decode, execute, and write stages; uses buffers and multiple hardware units to keep units busy.

What is a hazard in a pipeline, and what types exist?

Any condition that causes the pipeline to stall; main types are data hazards, instruction (control) hazards, and structural hazards.

What is a data hazard?

A stall caused when an instruction depends on the result of a previous instruction that has not yet completed.

What is operand forwarding (data forwarding)?

A technique to reduce stalls by routing the result of an instruction directly to a dependent instruction's input (e.g., from the Execute stage to the next stage).

What is the software approach to handling data hazards in pipelines?

Insert NOPs or reorder instructions in the compiler to insert delays, allowing dependent data to be produced before it is used.

What is a structural hazard and how can it be mitigated?

A resource conflict where two instructions require the same hardware resource simultaneously; mitigated by adding resources (e.g., separate caches) or more ports.

What are interrupts and traps in the context of exceptions?

Interrupts are external, asynchronous events (e.g., I/O, timer, page faults); traps are internal, synchronous exceptional conditions (e.g., overflow, undefined instruction).

What happens in hardware during an exception?

The pipeline is halted for the offending instruction, preceding instructions are allowed to complete, succeeding instructions are flushed, the cause is recorded, the address of the offending instruction is saved, and control jumps to the exception handler.

What happens in software during an exception?

The OS examines the cause, decides how to handle it, and may continue, retry, or abort the program.