CPU Structure & Instruction Flashcards - IQBAL S3 AA250912

Control Unit (CU)

It directs the flow of data, decodes instructions, and sends control signals to other components to execute instruction from memory

Arithmetic Logic Unit (ALU)

It performs all mathematical operations and logical comparisons

Registers

Very small, high-speed storage locations within the CPU

Program Counter (PC)

Holds the memory address of the next instruction to be fetched

Instruction Register (IR)

Holds the instruction currently being executed

Accumulator (ACC)

stores the results of calculations performed by the ALU

Memory Address Register (MAR)

Holds the address in memory that is currently being accessed

Memory Buffer Register (MBR)

Temporary hold data or instructions moving between the processor and main memory

Cache Memory

Stores frequently used data

Internal Bus

A set of wires that send data and signals between the internal components of the CPU

Clock

Generates a constant pulse in GHz to synchronize the timing of all internal operations

Fetch

CU retrieves the instruction from the memory address stored in the PC and move to IR

Decode

CU interprets the IR to understand what task needs to be performed

Execute

Perform a execution

Store

The execution is stored in a register or written back into the main memory

Reduced Instruction Set Computer (RISC)

CPU design philosophy using a small, simple, highly optimized set of instructions for faster execution

Complex Instruction Set Computer (CISC)

CPU design philosophy where single instructions perform multi-step tasks, aiming for fewer instructions per program but taking more clock cycles

Pipelining

Boosts CPU performance by breaking instruction execution into sequential stages and processing multiple instructions simultaneously

Superscalar execution

allows CPU to execute multiple instructions in a single clock cycle by dispatch them to parallel execution unit

Floating Point Unit (FPU)

Handles complex decimal math