1.1.1 The characteristics of contemporary processors, input, output and storage devices

What is the program counter?

stores the location of the next instruction in a program to be executed

What is the accumulator?

holds the data being processed and the results of processing
- results of calculations carried out by ALU can be temporarily stored

What is the Memory Address Register (MAR)?

stores the location for data to be fetched from or sent to memory

What is the Memory Data Register (MDR)?

Stores data that has been read from or is written to memory

What is the Current Instruction Register (CIR)?

holds the instruction currently being executed or decoded
- Contents of MDR is copied to CIR if it is an instruction
- Contains opcode and operand(s) of current instruction (Instruction= opcode and operand)

What is the Arithmetic Logic Unit (ALU)?

processes arithmetic and logical calculations
- Addition, subtraction, multiplication, division on fixed and floating point numbers
- Logical bitwise operations, such as AND, OR, NOT, and XOR
- Comparisons between values, such as greater than, less than, equal to
- Shifting binary patterns to the left or right

What is the Control Unit (CU)?

component of the CPU that manages instructions
- Directs flow of data between CPU and other devices
- Accepts next instruction and decodes into sub sequential steps

What is the address bus?

carries memory addresses that identify where data is being read from or written to

What is the data bus?

bi-directional, carries binary 1s and 0s that make up information being transmitted around CPU/computer

What is the control bus?

bi-directional, carries command and control signal to and from other CPU/computer

What is assembly code?

type of low-level programming language that is intended to communicate directly with a computer's hardware

What is the mnemonic for add?

ADD

What is the mnemonic for subtract?

SUB

What is the mnemonic for store?

STA

What is the mnemonic for load?

LDA

What is the mnemonic for branch always?

BRA

What is the mnemonic for branch if zero?

BRZ

What is the mnemonic for branch if positive?

BRP

What is the mnemonic for input?

INP

What is the mnemonic for output

OUT

What is the mnemonic for end program?

HLT

What is the mnemonic for data location?

DAT

What is the fetch-decode-execute cycle?

process CPU repeats to retrieve and execute instructions

What happens during the fetch part?

- Address of next instruction is copied from PC to MAR
- Instruction held at that address is copied to MDR, simultaneously content of PC is incremented so that it holds address of next instruction
- Contents of MDR are copied to CIR

What happens during the decode part?

- Instruction held at CIR is decoded, instruction split into opcode + operand and opcode used to determine type of instruction and what hardware to use execute it
- Operand holds either:
- Address of data to be used with operation which is then copied to MAR or
- Actual data to be operated on, which will be copied to MDR
- Data to be operated on may be passed to ALU/accumulator

What happens during execute part?

appropriate instruction/opcode is carried out on the operand

What are the main factors affecting processor performance?

- clock speed
- number of cores
- amount and type of cache

How does clock speed affect processor performance?

number of clock cycles completed per second, measured in Hertz
- Increased clock speed = fetch decode execute cycles completed faster = increased performance

How does the number of cores affect processor performance?

independent processor that is able to run its own fetch-execute cycle
- more cores = more fetch decode execute cycles completed = increased performance

How does the amount and type of cache affect processor performance?

high speed memory that stores frequently used instructions
- more cache = more frequently used instructions stored = less time to fetch instruction = more fetch decode execute cycles completed = increased performance

What is pipelining?

process of completing the fetch, decode, and execute cycles of three separate instructions simultaneously, holding appropriate data in a buffer in close proximity to CPU until required

What is the purpose of pipelining?

to reduce the amount of the CPU which is kept idle
- separated into instruction pipelining and arithmetic pipelining:

What is instruction pipelining?

separating out instruction into fetching, decoding, and executing

What is arithmetic pipelining?

breaking down the arithmetic operations and overlapping them as they are performed

What does Von Neumann architecture include?

basic components of computer and processor (single control unit, ALU, registers and memory units)

What are the main characteristics of Von Neumann Architecture?

- used in conventional processors in PCs, servers
- shared memory + shared data bus used for both data and instructions
- built on stored program concept

What are the advantages of Von Neumann architecture?

- cheaper to develop as control unit is easier to design
- programs can be optimised in size

When is Harvard architecture used?

with embedded processor

What are the characteristics of Harvard architecture?

- physically separate memories for instructions and data (useful for when memories have different characteristics)
- parallel data and instruction buses may be used
- programs tend to be large

What are the advantages of Harvard architecture?

- quicker execution as data + instructions can be fetched in parallel
- memories can be different sizes (more efficient use of space)

What is a Contemporary Processor Architecture?

combination of Harvard and Von Neumann architecture

When are Von Neumann Architecture and Harvard Architecture used in the Contemporary Processor Architecture?

Von Neumann used when working with data and instructions in main memory, Harvard Architecture used to divide cache into instruction cache and data cache

What is a bus?

set of parallel wires connecting 2 or more components of a computer together