CS 1.1.1

Flashcards for OCR Computer Science A Level - 1.1.1 Structure and Function of the Processor

What is the main function of the processor?

The processor executes instructions which allows programs to run.

What is the role of the Arithmetic and Logic Unit (ALU)?

The ALU completes all of the arithmetical and logical operations.

Give examples of Arithmetical operations

Mathematical operations such as addition and subtraction on fixed or floating point numbers.

Give examples of Logical operations

Boolean logic operations such as AND, OR, NOT, and XOR.

What are the main functions of the Control Unit?

Controlling and coordinating the activities of the CPU, managing the flow of data between the CPU and other devices, accepting the next instruction, decoding instructions, and storing the resulting data back in memory.

What are Registers?

Small memory cells that operate at a very high speed, used to temporarily store data.

What is the purpose of the Program Counter (PC)?

Holds the address of the next instruction to be executed.

What is the purpose of the Accumulator (ACC)?

Stores the results from calculations.

What is the purpose of the Memory Address Register (MAR)?

Holds the address of a location that is to be read from or written to.

What is the purpose of the Memory Data Register (MDR)?

Temporarily stores data that has been read or data that needs to be written.

What is the purpose of the Current Instruction Register (CIR)?

Holds the current instruction being executed, divided up into operand and opcode.

Define Buses

A set of parallel wires which connect two or more components inside the CPU.

Name the three buses in the CPU.

Data bus, control bus, and address bus.

What is the Data Bus used for?

Transporting data and instructions between components (bi-directional).

What is the Address Bus used for?

Transmitting the memory addresses specifying where data is to be sent to or retrieved from.

What is the Control Bus used for?

Transmitting control signals between internal and external components (bi-directional), coordinating the use of the address and data buses, and providing status information between system components.

What are some examples of control signals?

Bus request, Bus grant, Memory write, Memory read, Interrupt request, Clock.

What is assembly language?

Assembly code uses mnemonics to represent instructions in a simplified way (e.g., ADD for addition).

What is the difference between operand and opcode?

The operand contains the data or the address of the data, and the opcode specifies the type of instruction to be executed.

What is pipelining?

The process of completing the fetch, decode, and execute cycles of three separate instructions simultaneously.

Explain instruction pipelining.

Separating out the instruction into fetching, decoding, and executing.

Explain arithmetic pipelining.

Breaking down the arithmetic operations and overlapping them as they are performed.

What is the Fetch-Decode-Execute cycle?

The sequence of operations that are completed in order to execute an instruction.

Describe the Fetch phase of the Fetch-Decode-Execute cycle.

Address from the PC is copied to the MAR, instruction held at that address is copied to MDR by the data bus, simultaneously the contents of the PC are increased by 1, and the value held in the MDR is copied to the CIR.

Describe the Decode phase of the Fetch-Decode-Execute cycle.

The contents of CIR are split into operand and opcode.

Describe the Execute phase of the Fetch-Decode-Execute cycle.

The decoded instruction is executed.

What are the three main factors affecting CPU performance?

Clock speed, number of cores, and the amount and type of cache memory.

What determines clock speed?

The system clock.

Define a CPU Core

An independent processor that is able to run its own fetch-execute cycle

How does cache memory improve CPU performance?

Instructions fetched from main memory are copied to the cache, so if required again, they can be accessed quicker.

What are the properties of Level 1 Cache?

Very fast memory cells with a small capacity (2-64KB).

What are the properties of Level 2 Cache?

Relatively fast memory cell, with a medium sized capacity (256KB-2MB).

What are the properties of Level 3 Cache?

Much larger and slower memory cell.

Define the Von Neumann architecture

A shared memory and shared data bus is used for both data and instruction. This architecture is built on the stored program concept.

Define the Harvard Architecture

Physically separate memories for instructions and data.

Advantages of Von Neumann Architecture

Cheaper to develop as the control unit is easier to design. Programs can be optimised in size

Advantages of Harvard Architecture

Quicker execution as data and instructions can be fetched in parallel. Memories can be different sizes, which can make more efficient use of space

How do contemporary processors combine Harvard and Von Neumann architectures?

Von Neumann is used when working with data and instructions in main memory, but uses Harvard architecture to divide the cache into instruction cache and data cache.