Week 11 AOS: Memory Management (Content)

Memory hierarchy

Registers, cache, RAM, disk. (Different speeds/capacities.)

Primary memory

RAM/ROM used for active processes. (Fast.)

Virtual address

Address relative to process’s address space. (Logical.)

Physical address

Actual RAM location. (Hardware.)

Address space

Range of virtual addresses a process can use. (Process view.)

Compile-time binding

Addresses fixed at compile time. (No relocation.)

Load-time binding

Addresses assigned when loaded. (Static.)

Execution-time binding

Addresses translated dynamically. (Flexible.)

Transparency requirement

Processes unaware of memory sharing. (Abstraction.)

Safety requirement

Processes cannot corrupt each other or OS. (Protection.)

Efficiency requirement

Sharing must not degrade performance. (Speed.)

Relocation definition

Mapping logical to physical addresses. (Movement allowed.)

Static relocation

Fixed at load time; cannot move. (Inflexible.)

Dynamic relocation

Base + limit registers allow movement. (Flexible.)

Swapping

Move process to disk and back. (Handles overload.)

Backing store

Disk area storing swapped-out processes. (Fast enough for swapping.)

Contiguous allocation

Each process in one block. (Simple but fragmented.)

Holes

Free memory blocks of various sizes. (Fragmentation.)

First-fit

Use first hole big enough. (Fast.)

Best-fit

Use smallest suitable hole. (Less leftover.)

Worst-fit

Use largest hole. (Creates big leftovers.)

Limitations of relocation

External fragmentation; poor growth handling. (Rigid.)

External fragmentation

Free memory split into small pieces. (Wasted.)

Internal fragmentation

Allocated block larger than needed. (Wasted inside.)

Compaction

Shuffle memory to combine free space. (Expensive.)

Paging motivation

90/10 rule; only active pages needed. (Efficiency.)

Paging definition

Divide memory into fixed-size pages/frames. (Eliminates external fragmentation.)

Paging drawback

Internal fragmentation (½ page). (Small waste.)

Page table

Maps virtual pages to physical frames. (Translation.)

MMU

Hardware translating virtual to physical addresses. (Fast.)

Virtual address structure

Page number + offset. (Two parts.)

TLB

Cache of recent page translations. (Speeds up paging.)

TLB miss handling

Hardware or OS loads entry. (Extra cycle.)

Shared pages

Multiple processes map same physical page. (Efficient.)

Reentrant code

Code that can be shared safely. (No self-modification.)

Segmentation

Divide program into logical units (code, stack, heap). (Logical view.)

Segment table

Maps segment number + offset to physical memory. (Translation.)

Segmentation drawback

External fragmentation. (Variable sizes.)

Segmented paging

Segments divided into pages. (Combines benefits.)

Paging vs segmentation

Paging = fixed size; segmentation = logical units. (Different purposes.)

Combined approach

Segments paged into frames. (Flexible + scalable.)