Memory Mapped I/O

How is Software Connected to Hardware?

• Interacts via control registers

• Hardware modules (GPIO, ADC, Timers)

• Configurations through registers

• Registers made of flip-flops

• Readable/writable by CPU

Control Register Definition

• Set of flip-flops in hardware module

• Inputs/outputs wired to other circuits

• Writing configures behavior

• Reading retrieves status or data

CPU Interaction with Control Registers - Two Methods

1. Special I/O Instructions
   • Separate address space
2. Memory Mapped I/O (MMIO)
   • I/O registers in memory space
   • Mixed usage by some CPUs

I/O Instructions Method

• Dedicated instruction set for I/O
• Examples: IN, OUT
• Direct communication with I/O port registers
• Separate address space from main memory

Memory Mapped I/O (MMIO) Method

• I/O registers have unique memory addresses
• Standard memory access instructions
• Load/store operations for reading/writing

I/O Instructions vs. MMIO - Address Space

• Special I/O instructions consume opcode bits
• MMIO avoids this by reusing memory access instructions
• Keeps instruction set smaller

I/O Instructions vs. MMIO - Access Convenience

• MMIO uses all CPU memory addressing modes
• I/O instructions offer fewer addressing modes
• More flexibility with MMIO

I/O Instructions vs. MMIO - Cache Complications

• MMIO can be complicated by CPU caching
• Memory-mapped input registers may change state
• Cached reads may return stale data

AT90USB1286 Address Spaces

• Separate address spaces in AT90USB1286
• Program Memory (0x00000-0x1FFFF) for flash
• EEPROM (0x0000-0x0FFF) for non-volatile data
• Data Memory for RAM and I/O registers

C Language von Neumann Assumption

• Assumes single, flat address space
• Workarounds for Harvard architectures
• Specific offsets to indicate intended address space

AT90USB1286 Data Memory Map Structure

• Data memory map organized as follows:
  • 0x0000-0x001F (32 General Registers)
  • 0x0020-0x005F (64 I/O Registers)
  • 0x0060-0x00FF (160 Extended I/O Registers)
  • 0x0100-0x10FF (Internal RAM)
  • 0x2100+ (External RAM)

Hardware Module Configuration via I/O Registers

• Configured and controlled by I/O registers
• Registers are memory-mapped into data address space

General Purpose Registers in Memory Map

• 32 general purpose registers (R0-R31)
• Mapped into memory address space
• Accessible via memory operations and register instructions

PORTF, DDRF, PINF Registers

• Specific I/O registers for Port F:
  • PORTF (output data)
  • DDRF (data direction register)
  • PINF (input data)
  • Unique memory addresses defined in avr/io.h

avr/io.h and Register Address Mapping

• Provides C preprocessor #define statements
• Assigns constant labels (e.g., DDRF, PORTB)
• Maps to the correct memory addresses for I/O registers

uint8_t Type for Register Access

• Standard for 8-bit register manipulation
• Ensures exact 8-bit, unsigned behavior
• Matches physical size of AVR I/O registers

Setting a Bit in C (Bitwise OR)

• To set a specific bit in a register:
  • REGISTER |= _BV(BIT_NUMBER);
  • Example: DDRB |= _BV(PB7);
  • Sets PB7 as output

Clearing a Bit in C (Bitwise AND with NOT)

• To clear a specific bit:
  • REGISTER &= ~_BV(BIT_NUMBER);
  • Example: DDRB &= ~_BV(PB7);
  • Sets PB7 as input

_BV() Macro

• Common AVR macro
• Defined as _BV(bit) = (1 << bit)
• Converts bit position (0-7) into a byte with that bit set

Purpose of Bit Manipulation in Embedded C

• Allows individual configuration of 8-bit I/O registers
• Essential for controlling different pins/features
• Prevents modifying other bits in the register