Microprocessor midterm 4

🔹 Q1: What is Immediate Addressing?

🅰 The operand is part of the instruction.

Example: MOV AL, 12H

🔹 Q2: What is Register Addressing?

🅰 Operand is a register.

Example: MOV AL, BL

🔹 Q3: What is Direct Addressing?

🅰 Operand is a fixed memory address.

Example: MOV AL, [500H]

🔹 Q4: What is Register Indirect Addressing?

🅰 Operand is stored at a memory address held in a register.

Example: MOV CL, [BX]

🔹 Q5: What does LEA do?

🅰 Loads the effective address of a memory operand into a register.

Example: LEA AX, [BX+SI]

🔹 Q6: What are SI and DI used for?

🅰

• SI (Source Index) → Points to source string in DS

• DI (Destination Index) → Points to destination string in ES

🔹 Q7: What are the basic String Instructions?

🅰

• MOVSB/MOVSW: Move bytes/words

• CMPSB: Compare source & dest

• LODSB: Load from source

• STOSB: Store to destination

• SCASB: Scan compare with AL

🔹 Q8: What does REP do?

🅰 Repeats the following string instruction CX times

Example: MOV CX, 5 REP MOVSB

🔹 Q9: What is the Direction Flag (DF)?

🅰 Controls whether SI/DI increment or decrement after string instructions.

• CLD: Clear DF → auto increment

• STD: Set DF → auto decrement

🔹 Q10: What happens in MUL with 16-bit source?

🅰

(DX:AX) = AX * source — Result is stored across DX and AX

🔹 Q11: How does DIV with 16-bit source work?

🅰

• AX = (DX:AX) / source

• DX = remainder

🔹 Q12: What’s the difference between CMP and SUB?

🅰

Both subtract, but CMP doesn’t store the result — only updates flags

🔹 Q13: What is a Short Jump?

🅰 Jump to address within ±127 bytes using relative offset.

Example: JMP +50

🔹 Q14: Difference between Near and Far Jump?

🅰

• Near Jump → New IP only (same segment)

• Far Jump → New CS + IP (new segment)

Q1:
What are the 64-bit, 32-bit, 16-bit, and 8-bit versions of the accumulator register?

A1:

• 64-bit: RAX

• 32-bit: EAX

• 16-bit: AX

• 8-bit: AH (high), AL (low)

Q2:
What do A, B, C, and D represent in register names like AX, BX, CX, DX?

A2:

• A → Accumulator

• B → Base

• C → Counter

• D → Data (or Destination)

Q3:
What is the structure of an Assembly instruction?

A3:
Label | Opcode | Operand(s) | Comment
DATA1 DB 23H ; Define a byte of 23H

MOV AL, BL ; Copy BL into AL

Q4:
In the Tiny model, what is the relationship between the DS and CS segments?

A4:
DS = CS → Code and data are in the same segment.

Q5:
What’s the purpose of .STARTUP, .EXIT, and .END?

A5:

• .STARTUP → Start of the program

• .EXIT → Exits to DOS

• .END → Ends the program

Q6:
What are DB and DW used for in Assembly?

A6:

• DB (Define Byte): Allocates 8-bit value

• DW (Define Word): Allocates 16-bit value

Q7:
Define Immediate Addressing and give an example.

A7:
Operand is in the instruction itself.
Example: MOV AL, 12H

Q8:
Define Register Addressing and give an example.

A8:
Data is moved between registers.
Example: MOV AL, BL

Q9:
Define Direct Addressing and give an example.

A9:
Operand is a direct memory address.
Example: MOV AL, [500]

Q10:
Define Register Indirect Addressing and give an example.

A10:
The register holds the memory address.
Example: MOV CL, [BX]

Q11:
What is Base-plus-Index Addressing?

A11:
Address = BX + SI (or any base + index)
Example: MOV BP, [BX+SI]

Q12:
What is Scaled Index Addressing?

A12:
Address = Base + (Index × Scale)
Example: MOV AX, [EBX+2×ESI]

Q13:
What does PTR mean in assembly?

A13:
It stands for "pointer", used to define size like BYTE PTR, WORD PTR

Q14:
Which addressing mode is used in MOV CH, [DOG]?

A14:
Direct addressing using a memory label (symbolic name)

Q15:
In register models, which registers are program-visible?

A15:
General-purpose registers (e.g., AX, BX, CX, DX, SI, DI, BP, SP)
Used directly in instructions.

Q16:
In which model is CS = DS?

A16:
Tiny Model

Q17:
What’s the total memory space used in the Tiny model?

A17:
64 KB (shared between code and data)

Q18:
What’s the total memory space in the Small model?

A18:
128 KB (64 KB code + 64 KB data)

What does CR3 hold?

Page Directory Base Address

How many bits are in the linear address?

32 bits

What are the 3 parts of a linear address in IA-32 paging?

PDE (10 bits), PTE (10 bits), Offset (12 bits)

What is the page size in Intel paging?

4KB

How many entries are in a Page Directory or Page Table?

1024

What does CR0’s 31st bit do?

Enables paging (1 = on)

What does a PDE point to?

A Page Table

What does a PTE point to?

A 4KB memory page

What happens if paging is disabled?

Linear address = Physical address

What is the role of the Offset in paging?

Identifies the exact byte in the 4KB page