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What does the processor do?
It executes instructions which allows programs to run.
What does the Arithmetic Logical Unit do?
Completes all of the arithmetical and logical operations.
What are some examples of arithmetical operations?
Addition and subtraction on fixed or floating point numbers.
What are some examples of logical operations?
Boolean Logic operations such as AND, OR, NOT and XOR.
What does the Control Unit do?
It is the component of the processor which controls and coordinates the activities of the CPU and manages the flow of data between the CPU and other devices.
What does the Control Unit do with instructions?
Accepts the next instruction and decodes instructions and stores the resulting data back in memory.
What is a register?
A small memory cell that operates at a very high speed that is used to temporarily store data.
What operations occur in registers?
All arithmetic, logical and shift operations.
What is the purpose of the Program Counter?
Holds the memory address of the next instruction to fetch.
What is the purpose of the Accumulator?
Stores the results from calculations.
What is the purpose of the Memory Address Register?
Holds the address of a location that it is to be read from or written to.
What is the purpose of the Memory Data Register?
Temporarily stores data that has been read or data that needs to be written.
What is the purpose of the Current Instruction Register?
Holds the current instruction being executed, divided up into operand and opcode.
What are buses?
A set of parallel wires which connect two or more components inside the CPU.
What are all three of the buses collectively called?
The system bus.
What is the width of the bus?
The number of parallel wires the bus has.
What is the width of the bus directly proportional to?
The number of bits that can be transferred simultaneously at any given time.
How wide are buses typically?
8, 16, 32 or 64 wires wide.
What direction does the data bus go?
It is bi-directional.
What does bi-directional mean?
Bits can be carried in both directions.
What is the data bus used for?
Transporting data and instructions between components.
What is the address bus used for?
Used to transmit memory addresses.
What do the memory addresses specify?
Where data is to be sent to or be retrieved from.
What is the width of the address bus directly proportional to?
The number of addressable memory locations.
What direction is the control bus?
It is bi-directional.
What is the control bus used for?
To transmit control signals between internal and external components.
What does the control bus coordinate?
The use of the address and data buses.
What else does the control bus provide?
Status information between system components.
What does the control bus signal the bus request do?
Shows that a device is requesting the use of the data bus.
What does the control bus signal the bus grant do?
Shows that the CPU has granted access to the data bus.
What does the control bus signal the memory write do?
Data is written into the addressed location using this bus.
What does the control bus signal the memory read do?
Data is read from a specific location to be placed onto the data bus.
What does the control bus signal the interrupt request do?
Shows that a device is requesting access to the CPU.
What does the control bus signal the clock do?
Used to synchronise operations.
How does assembly code represent instructions?
Using mnemonics.
What are mnemonics?
A simplified way of representing machine code.
Using mnemonics, how is addition represented?
ADD.
How is the instruction divided in the Current Instruction Register?
Into the operand and the opcode.
What does the operand contain?
The data or the address of the data upon which the operation is to be performed.
What does the opcode do?
It specifies the type of instruction to be executed.
What comes first? Opcode or Operand?
Opcode.
What is pipelining?
The process of completing the fetch, decode and execute cycles of three separate instructions simultaneously.
What else does pipelining do?
Holds appropriate data in a buffer in close proximity to the CPU until its required.
What is helpful about pipelining?
While one instruction is being executed, another can be decoded and another fetched.
What is pipelining aimed to do?
To reduce the amount of the CPU which is kept idle.
How is pipelining separated?
Into instruction pipelining and arithmetic pipelining.
What is instruction pipelining?
Separating out the instruction into fetching, decoding and executing.
What is arithmetic pipelining?
Breaking down the arithmetic operators and overlapping them as they are performed.
What is the FDE cycle?
The sequence of operations that are completed in order to execute an instruction.
What is the 1st step in the Fetch phase?
Address from the PC is copied to the MAR.
What is the 2nd step in the Fetch phase?
Instruction held at that address is copied to MDR by the data bus.
What is the 3rd step in the Fetch phase?
Simultaneously, the contents of the PC are increased by 1.
What is the 4th step in the Fetch phase?
The value held in the MDR is copied to the CIR.
What is the only step in the Decode phase?
The contents of CIR are split into operand and opcode.
What is the only step in the Execute phase?
The decoded instruction is executed.
What are the three factors that affect CPU performance?
Clock speed, number of cores and the amount and type of cache memory.
What is the clock speed determined by?
The system clock.
What is the system clock?
An electronic device which generates signals, switching between 0 and 1.
What begins on a clock pulse?
All processor activities
How does each CPU operation starts?
As the clock changes from 0 to 1.
What is the clock speed?
The time taken for one clock cycle to complete.
What is a core?
An independent processor that is able to run its own fetch-execute cycle.
What can a computer with multiple cores do?
Complete more than one fetch-execute cycle at any given time.
What is the downside of having multiple cores?
Not all programs are able to utilise multiple cores efficiently as they have not been designed to do so.
What is cache memory?
The CPU’s onboard memory.
Where are instructions fetched from main memory copied?
To the cache.
Why are instructions fetched from main memory copied to the cache?
So that they can be accessed quicker.
What happens when cache fills up?
Unused instructions are replaced.
What is the property of Level 1 cache?
Very fast memory cells with a small capacity.
What is the property of Level 2 cache?
Relatively fast memory cell with a medium sized capacity.
What is the property of Level 3 cache?
Much larger and slower memory cell.
What does the Von Neumann architecture consist of?
Includes the basic components of the computer and processor.
What components are in the Von Neumann architecture?
A single control unit, ALU, registers and memory units, in which a shared memory and shared data bus is used for both data and instructions.
What is the Von Neumann architecture built on?
The stored program concept.
What does the Harvard architecture have?
Physically separate memories for instructions and data.
What is Harvard architecture more commonly used with?
Embedded processors.
What is Harvard architecture useful for?
When memories have different characteristics, such as instructions may be read only while data may be read-write.
What is useful that Harvard architecture allows us to do?
Optimize the size of individual memory cells and their buses depending on your needs.
Such as the instruction memory can be designed to be larger so a larger word size can be used for instructions.
Give an advantage of Von Neumann architecture.
Cheaper to design as the control unit is easier to design.
Give a second advantage of Von Neumann architecture.
Programs can be optimized in size.
Give an advantage of Harvard architecture.
Quicker execution as data and instructions can be fetched in parallel.
Give a second advantage of Harvard architecture.
Memories can be different sizes, which can make more efficient use of space.
How is Contemporary Processing used?
When working with data and instructions in main memory, but uses Harvard architecture to divide the cache into instruction cache and data cache.
What happens during the fetch phase?
PC sends a signal to the MAR, address sent via address bus, instruction loaded into MDR, copied into CIR, PC increments.
What happens during the decide stage?
CU interprets the instruction in the CIR.
What happens during the execute stage?
The ALU or CU carries out the instruction, storing results in ACC or memory.