Processors, Architectures and Memory

Flashcards about Processors and Memory, Von Neumann Architecture, RISC/CISC, Processor Commands, Pipelining and Memory Types

Who proposed the Von Neumann architecture and when?

John von Neumann in 1945

What is the stored-program concept in the Von Neumann architecture?

Instructions and data are stored in the same memory.

What are the three major units of the Von Neumann architecture?

Central Processing Unit (CPU), Main Memory Unit, Input/Output Devices

What are the main components of the CPU?

Control Unit (CU), Arithmetic and Logic Unit (ALU), Registers

What is the function of the Control Unit (CU)?

Directs processor control signals and manages the flow of data between components. Fetches, decodes, and executes program instructions.

What is the function of the Arithmetic and Logic Unit (ALU)?

Handles arithmetic calculations and logical operations.

What are the key types of registers in the CPU?

Accumulator (AC), Program Counter (PC), Memory Address Register (MAR), Memory Data Register (MDR), Current Instruction Register (CIR), Instruction Buffer Register (IBR)

Where are program instructions and data stored?

Main Memory

What are the components of the main memory?

Instruction Memory and Data Memory

Name the three types of buses.

Data Bus, Address Bus, Control Bus

What are the steps of the Von Neumann Execution Cycle?

Fetch, Decode, Execute, Store, Repeat

What is the Von Neumann bottleneck?

Shared memory access for both instructions and data, leading to contention.

What is the main difference between the Von Neumann and Harvard architectures in terms of memory?

Von Neumann uses single memory for both instructions and data, while Harvard uses separate memories.

What is RISC?

Reduced Instruction Set Computing: simplifies hardware by using a few basic steps

What is one advantage of RISC?

Simpler instructions, Faster execution, Lower power consumption, Highly pipelined

What is CISC?

Complex Instruction Set Computing: a single instruction can perform multiple operations

What is one advantage of CISC?

Reduced code size, More memory efficient, Widely used

What is the focus of RISC?

Software

What is the focus of CISC?

Hardware

What are processor commands?

the operations that the CPU performs

What category do MOV, PUSH, and POP instructions belong to?

Data Transfer Instructions

What category do ADD, SUB, IMUL, and IDIV instructions belong to?

Arithmetic Instructions

What category do AND, OR, XOR, and NOT instructions belong to?

Logical Instructions

What category do JMP, JE/JZ, JNE/JNZ, CALL, and RET instructions belong to?

Control Transfer Instructions

What is the purpose of CMP and TEST instructions?

Comparison Instructions

What is the purpose of SHL/SHR and ROL/ROR instructions?

Shift and Rotate Instructions

What is the purpose of MOVSB, LODSB, and STOSB instructions?

String Manipulation Instructions

What are some examples of special instructions?

HLT, NOP, INT n, CLI, STI

What is the function of general-purpose registers?

Used for arithmetic, data transfer, and logic operations.

What are the main general-purpose registers?

EAX (Accumulator), EBX (Base), ECX (Counter), EDX (Data)

What is the function of segment registers?

Hold segment addresses for memory management in real mode.

What are the main segment registers?

CS (Code Segment), DS (Data Segment), SS (Stack Segment), ES, FS, GS

What is the function of index and pointer registers?

Used for memory addressing and string manipulation.

What are the main index and pointer registers?

ESI (Source Index), EDI (Destination Index), ESP (Stack Pointer), EBP (Base Pointer)

What is the function of control registers?

Used to control CPU operations.

What is the significance of EIP?

Holds the address of the next instruction to be executed.

What is pipelining?

a technique used in processors to improve performance by breaking down the execution of instructions into stages that can operate in parallel

What are five stages in a basic pipeline?

Instruction Fetch (IF), Instruction Decode (ID), Instruction Execute (EX), Memory Access (MEM), Write Back (WB)

What is throughput?

The number of instructions completed per unit time, indicating the overall processing speed.

What is latency?

The time taken for a single instruction to complete, from fetch to write-back.

What are pipeline hazards?

Data hazards (dependencies between instructions), control hazards (branch instructions), and structural hazards (insufficient hardware resources) can cause delays.

What is a superscalar architecture?

A superscalar processor builds on pipelining by allowing multiple instructions to be processed simultaneously in different pipelines.

What is Instruction-Level Parallelism (ILP)?

Allows multiple instructions to be fetched, decoded, and executed concurrently.

Name the three types of physical memory construction.

Semiconductor, Magnetic, Optical

Name the two types of memory organization.

Volatile, Non-Volatile

Name four types of memory access.

Random, Sequential, Direct, Associative

Name the three speed classifications of memory.

High, Medium, Low

Name the three access control classifications of memory.

Read-Only, Read-Write, Write-Once

Name the two durability classifications of memory.

Durable, Ephemeral

Name the three classifications of memory by usage.

Primary, Secondary, Tertiary

What are the RAM sub-categories?

Dynamic RAM (DRAM), Static RAM (SRAM)

What are the ROM sub-categories?

PROM, EPROM, EEPROM, Flash Memory