foundation of informatics

0th gen

mechanical

1st gen

vacuum tubes

2nd gen

transistors

3rd gen

integrated circuits + OS

4th gen

microprocessor

5th gen

parallel / quantum

volatile

loses data w/o power (DRAM)

DRAM vs SRAM

DRAM = denser, cheaper, slower

page (SSD)

smallest writable unit

block (SSD)

erase unit

SSD (1)

(1) wear-leveling

SSD (2)

(2) write amplification

HDD (1)

(1) uses LBA

HDD (2)

(2) rotational speed affects lifetime

von Neumann

data + instructions together

Harvard

separate data + instructions

Modified Neumann

separate caches

CPU parts

CU (control unit), ALU (arithmetic logic unit), registers (NOT SECONDARY MEMORY)

bitness

address bus width

IRQ

async events

DMA

bypass CPU

non-pipelined

one instruction at a time

BIOS

firmware, POST, loads MBR

UEFI

newer, .efi

kernel

ring 0

user apps

ring 3

CLI needs elevation

kernel access

control panel

configure system

AppData

user-specific

Admin

install system-wide apps

Guest unsafe

shared, minimal isolation

analog signal

continuous, human-perceivable

digital signal problems

quantized, rounding errors

serial bus

fewer wires

parallel bus

data + address + control

PCIe

serial, embedded clock, differential lanes

arbitration

decides who uses bus

EDO-RAM

asynchronous