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ALU (Arithmetic Logic Unit): Performs arithmetic and logical operations.
Control Unit (CU): Directs the operation of the processor by controlling the flow of data within the CPU and to/from memory.
Registers: Small, fast storage locations used to hold data temporarily during processing.
Fetch: The instruction is fetched from memory.
Decode: The instruction is decoded by the Control Unit.
Execute: The operation is performed by the ALU.
Single-core: One core processes instructions sequentially.
Multi-core: Multiple cores allow simultaneous processing of multiple instructions.
Program Counter (PC): Holds the address of the next instruction.
Accumulator (ACC): Stores intermediate results.
MAR (Memory Address Register): Holds the address in memory for the next data fetch.
MDR (Memory Data Register): Holds the data being transferred to/from memory.
IR (Instruction Register): Holds the current instruction.
A bus is a set of physical connections used to transfer data between components in the CPU.
Types include Data bus, Address bus, and Control bus.
Von Neumann Architecture: A computing architecture where data and instructions are stored in the same memory space.
Key components: CPU, Memory, I/O.
Instruction cycle: The complete cycle of fetching, decoding, and executing a single instruction.
Machine cycle: The set of operations needed to fetch, decode, and execute an instruction.