System Architecture Flashcards

Harvard Architecture

The Harvard architecture is a computer design that separates memory for instructions (program code) and data, allowing simultaneous access to both.

Key Features:

- Separate memory spaces for instructions and data.

- Parallel access improves speed.

- Simpler instruction pipelines.

Applications: Used in microcontrollers, DSPs, and real-time systems.

Harvard Architecture Advantages and Disadvantages

Advantages:

Faster processing.

Efficient for embedded systems.

Separate caches improve performance.

Disadvantages:

More hardware complexity.

Higher cost.

Limited flexibility (e.g., self-modifying code).

What is branch prediction?

Branch prediction is a CPU technique that guesses the outcome of a decision to keep the pipeline full and reduce delays.

How does branch prediction work?

The CPU guesses the branch direction before it's resolved.

What happens when the CPU makes a correct guess in branch prediction?

Smooth execution occurs.

What happens when the CPU makes a wrong guess in branch prediction?

A pipeline flush occurs, resulting in a performance penalty.

What are the two types of branch prediction?

Static and dynamic.

What is static branch prediction?

Static branch prediction uses fixed rules, such as always predicting taken.

What is dynamic branch prediction?

Dynamic branch prediction uses historical data, such as a Branch History Table.

What is a pro of branch prediction?

It speeds up execution and minimizes CPU stalls.

What is a con of branch prediction?

Wrong predictions cause delays and add design complexity.

stages of the MIPS pipeline

Fetch instruction, decode/read register, execute, access memory, write to register

Stall

Waiting for the next instruction to be fetched after a branch is taken

The Higher level languages are platform independent because of?

The last two phases of the complier process can be rewritten for different machines

What does CISC stand for?

Complex Instruction Set Computer

What is a characteristic of CISC regarding instruction size?

Variable instruction size

What does RISC stand for?

Reduced Instruction Set Computer

What type of instructions does RISC use?

Simple, limited instructions (one per cycle)

What is a characteristic of RISC instruction size?

Fixed instruction size

What is RISC optimized for?

Speed and efficiency

Does RISC require more or fewer lines of code compared to other architectures?

More lines of code

In what types of devices is RISC commonly used?

Mobile devices and embedded systems

What is one advantage of CISC architecture?

Optimized for reducing program size

What is a disadvantage of CISC architecture?

Fewer lines of code but slower execution

In which types of CPUs is CISC commonly found?

Common in desktop and server CPUs (e.g., x86)

Sequential Locality

Instructions tend to be accessed sequentially. When programs access memory locations in a certain order.

What is 2's complement a good way of representing negative numbers?

No special sign bit, easy to implement in hardware, no -0

MAR <- X

MBR <- M[MAR]

AC <- AC + MBR

Add X

Computers made in order from the 1st to now

Mechanical, Vacuum tube, Transistor, IC, VLSI, SoC

What is the difference in operation between a LOAD x and a LOADI x instruction?

The LOAD loads the value at address x to the AC; the LOADI loads the value found in the location addressed by the value in x to the AC

PC <- X

Jump X

What are the two fields in an instruction?

Opcode & Address

What is pipelining?

Pipelining is a technique where tasks are divided into smaller subtasks executed in parallel.

- Increases instruction throughput.

- Seen in the fetch-decode-execute cycle.

- Reduces CPU idle time.

1. Performance measured by:Execution time (latency): Time to 2. complete one task.Throughput: Tasks completed per unit time.

What are pipelining hazards?

Situations preventing the next instruction in the pipeline. Types include:

- Data Hazard: Dependency on previous instruction results.

- Control Hazard: Decision outcome unknown (e.g., branch).

- Structural Hazard: Hardware limitations for simultaneous tasks.

What is MIPS

MIPS (Microprocessor without Interlocked Pipeline Stages) is used in embedded systems with a 5-stage pipeline:

IF: Instruction Fetch.

ID: Instruction Decode.

EX: Execute/Address Calculation.

MEM: Access Memory.

WB: Write Back to Register.

How to resolve control hazards?

Stall on Branch: Wait for branch outcome before fetching.

Branch Prediction: Guess the outcome and proceed; correct predictions save time.

Delayed Decisions: Rearrange non-decision-related instructions to fill the gap.

What is instruction-level parallelism (ILP)?

ILP measures the number of operations that can be executed simultaneously.

Independent instructions are executed in parallel.

Dependent instructions wait for results of earlier ones.

How to resolve data hazards?

Forwarding: Use results before they're written to registers.

Bubbles/Interlock: Delay pipeline stages.

Compiler Optimization: Rearrange instructions to avoid stalls.

What are superscalar architectures?

Superscalar processors execute multiple instructions in parallel using:

Multiple pipelines or execution units.

Out-of-order execution to maximize ILP.

What is the meaning of ALU?

Arithmetic Logic Unit

What is the numeric range of an 8-bit binary number in 2's complement arithmetic?

-128 ...127

What is Flynn's Taxonomy?

A classification of parallel architectures:

SISD: Single Instruction, Single Data (sequential).

MISD: Multiple Instruction, Single Data (rare).

SIMD: Single Instruction, Multiple Data (e.g., vector processing).

MIMD: Multiple Instruction, Multiple Data (e.g., multicore systems).

What is Flynn's Taxonomy?

Flynn's Taxonomy classifies computer architectures based on simultaneous instruction and data streams:

SISD (Single Instruction, Single Data):

Sequential, no parallelism.

Example: Traditional single-core processors.

SIMD (Single Instruction, Multiple Data):

One instruction, multiple data streams.

Example: GPUs, vector processors.

MISD (Multiple Instruction, Single Data):

Multiple instructions, same data.

Rare; used in fault-tolerant systems.

MIMD (Multiple Instruction, Multiple Data):

Multiple instructions, multiple data streams.

Example: Multicore CPUs, clusters.

Which best describes the concept of context switching?

Preserve the process state and switch the CPU to another process

What were the essential functions of the simplest possible OS?

Load, execute and terminate a program

Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?

AND gates, OR gates, and NOT gates

MAR <- X

MBR <- M [MAR]

AC <- AC + MBR

ADD X

What is a computer system architecture?

It's the fundamental organization of a computer system, its components, their relationships, and design principles.

Describe the von Neumann model.

A stored-program computer with components: Control Unit, ALU, Registers, Main Memory, and I/O System. It operates using a single datapath.

What is the principle of abstraction in computer science?

It involves representing essential features without unnecessary details, allowing for reduced complexity and efficient system design.

What are the historical generations of computers?

Mechanical Calculating Machines (1642-1945)

First Generation: Vacuum Tube Computers (1945-1953)

Second Generation: Transistorised Computers (1955-1965)

Third Generation: Integrated Circuit Computers (1965-1980)

Fourth Generation: VLSI Computers (1980-Now)

What are the main systems in a computer?

Processor

Motherboard

Main Memory

Disk Drives

Expansion Cards

I/O Ports

Case

What is Moore's law?

The transistor count in integrated circuits doubles approximately every 18-24 months.

What is a semiconductor?

A material that can act as a conductor or insulator, essential for making transistors and silicon chips.

What were mechanical calculating machines capable of?

They performed basic arithmetic operations and included devices like the Difference Engine and Analytical Engine.

What advancements did third-generation computers introduce?

Integrated circuits, multiprogramming, time-sharing, and smaller, faster, cheaper systems.

What does the term "von Neumann bottleneck" refer to?

Delays caused by a single memory space for instructions and data.

What is the positional number system?

It represents numbers based on the position of digits and powers of the base, such as base 10 for decimal.

How do binary numbers represent data?

Using two symbols, "0" (off) and "1" (on), which can represent text, instructions, or numbers.

Define "bit," "byte," "nibble," and "word."

Bit: A single binary digit (0 or 1).

Byte: 8 bits.

Nibble: 4 bits.

Word: Two or more adjacent bytes.

What is the difference between signed and unsigned binary numbers?

Signed: Uses one bit for the sign (0 = positive, 1 = negative).

Unsigned: Does not use a bit for sign; all bits represent the number.

What are the steps for converting a negative number to binary using 2's complement?

Write the number as a positive binary.

Flip the bits (0 → 1, 1 → 0).

Add 1 to the flipped number.

What are floating-point numbers used for?

Representing very large, very small, rational, and irrational numbers.

What is hexadecimal, and why is it used?

A base-16 number system (0-9, A-F) used to simplify long binary numbers.

How do you convert binary to hexadecimal?

Split the binary number into 4-bit nibbles, then convert each nibble to hexadecimal.

What is ASCII used for?

Representing characters as binary numbers, limited to 128 or 256 characters.

What advantage does Unicode have over ASCII?

It can represent over 109,000 characters, including emojis and symbols from various languages.

What is a bitmap?

A matrix of bits representing an image, with pixel depth determining the color range.

How many bits per pixel do modern color images require?

24 bits or more per pixel for millions of colors.

What is Boolean Algebra?

A mathematical system for manipulating variables that have two values: 1 (true/on) or 0 (false/off).

What are the three main components of a simple computer?

CPU, Main Memory, and Input/Output Subsystem.

What are the core parts of the CPU?

he Datapath (includes ALU and Registers) and the Control Unit.

What is the role of the Control Unit (CU) in a CPU?

It sequences operations based on program counter values and signals other components.

How is clock speed measured, and what does it represent?

Measured in GHz or MHz; represents how fast a CPU can execute instructions.

What is MARIE architecture?

A simplified computer model for understanding CPU functionality and low-level programming.

Name the primary registers in MARIE.

AC, MAR, MBR, PC, IR, InReg, OutReg.

What are the key characteristics of MARIE architecture?

2's complement binary data representation.

Fixed 16-bit word length.

4K word-addressable main memory

Describe the Fetch-Decode-Execute (FDE) cycle in MARIE.

Fetch instruction → Decode in IR → Retrieve operand → Execute instruction.

What is the SKIPCOND instruction in MARIE?

Acts like an "IF" statement, skipping the next instruction based on the AC value.

How does MARIE differentiate between direct and indirect addressing?

Direct: Operand's address is in the instruction.

Indirect: Address of the operand's address is in the instruction.

What is an assembler's role?

Converts human-readable instructions (e.g., LOAD 104) into machine language.

What is the main difference between RISC and CISC architectures?

RISC: Few instructions, single-cycle execution, post-1990.

CISC: Complex instructions, multiple cycles, pre-1990.

What is the Instruction Set Architecture (ISA)?

Specifies the set of instructions a computer can perform, serving as an interface between hardware and software.

How is microoperation sequence defined in MARIE?

Using Register Transfer Language (RTL), e.g., M[X]←ACM[X] \leftarrow ACM[X]←AC to show memory transfer.

How does the program counter (PC) function in MARIE?

It holds the address of the next instruction to be executed and increments after each instruction.

What are the two types of main memory

AM (volatile) and ROM (non-volatile)

What are the two types of RAM?

DRAM (Dynamic RAM) and SRAM (Static RAM

What are key characteristics of DRAM?

Uses capacitors, requires frequent refreshing.

Low power consumption.

Small size and low cost.

What are key characteristics of SRAM?

Uses 6 transistors per bit, fast access.

High power consumption.

Larger size and high cost.

ROM Overview

What is ROM?A: Non-volatile memory used to store permanent data that cannot be changed.

Name the types of ROM.

PROM, EPROM, EEPROM, and Flash Memory.

Arrange the memory hierarchy from fastest to slowest.

Registers → L1 Cache → L2 Cache → Main Memory → SSD → HDD → Optical Disk → Magnetic Tape.

What is a hit and a miss in memory?

Hit: Data found at a memory level.

Miss: Data not found, requiring access to lower levels.

Effective Access Time (EAT) Formula

EAT=H×Access TimeC​+(1−H)×Access TimeMM​,where HHH is hit rate.

What are the three cache mapping methods?

Direct Mapping, Associative Mapping, and Set-Associative Mapping.

What is virtual memory?A:

Temporary memory used when RAM is full, storing tasks in secondary storage.

What are the three forms of locality?

Temporal locality, Spatial locality, Sequential locality.

What is the difference between split and combined cache?

Split Cache: Separate pathways for instructions and data (Harvard Architecture).

Combined Cache: Shared pathway (Von Neumann Architecture).

What is flash memory, and where is it used?

A modern EEPROM used in USB drives, SSDs, and phones.

What is the role of an operating system?

The OS is a hardware interface, resource manager, and execution platform for programs.