CS-3310 - 04 I/O and Disks - I/O

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27 Terms

1
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What are the two main components of an I/O device?

A hardware interface and an internal structure.

2
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Why do I/O devices need a hardware interface?

It allows the operating system to control and communicate with the device.

3
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What are the three common device registers in a canonical I/O protocol?

Status register, command register, and data register.

4
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What does the status register do?

It indicates whether the device is ready or busy.

5
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What does the command register do?

It tells the device to perform a specific task or operation.

6
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What does the data register do?

It transfers data between the device and the CPU.

7
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What is programmed I/O (PIO)?

A simple I/O protocol where the CPU directly manages data transfer and polls the device for readiness.

8
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Why is programmed I/O inefficient?

Because the CPU must wait for the device, wasting cycles on polling instead of doing other work.

9
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How do interrupts reduce CPU overhead in I/O operations?

They let the CPU perform other tasks and notify it when the device is ready via an interrupt.

10
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What is an interrupt service routine (ISR)?

A special function in the OS that runs when a hardware interrupt occurs to handle the device's completion event.

11
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What is the main advantage of interrupts over polling?

They allow overlap between computation and I/O, improving overall system utilization.

12
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When might interrupts not be ideal?

For very fast devices where the interrupt overhead outweighs the benefit.

13
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What is a precise interrupt?

An interrupt that leaves the machine in a well-defined state: all prior instructions complete, none after have started.

14
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What is an imprecise interrupt?

An interrupt that occurs when the CPU state is not fully consistent, making recovery difficult.

15
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What is Direct Memory Access (DMA)?

A hardware mechanism that transfers data between memory and devices without CPU intervention.

16
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How does DMA improve performance?

It offloads data transfer work from the CPU, reducing context switches and wait time.

17
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What is a limitation of DMA?

It's slower than the CPU for small data transfers and requires setup overhead.

18
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What are the two methods for device interaction with the CPU?

Port-mapped I/O (using special instructions) and memory-mapped I/O (using memory addresses for device registers).

19
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What is memory-mapped I/O?

A method where hardware makes device registers accessible via normal memory addresses.

20
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What is a device driver?

A kernel module that implements the specifics of a device, allowing the OS to communicate with it through a standard interface.

21
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Why is abstraction important in I/O systems?

It hides hardware-specific details so the OS can remain device-neutral.

22
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I/O layers

user process, device-independent software, device drivers, interrupt handlers, hardware

23
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which I/O software layer is skipped on the way down?

interrupt handlers because they are only triggered by the hardware

24
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lowest level software I/O layer

interrupt handler

25
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top layer of I/O software

user process

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second layer of I/O software

device-independent software

27
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third layer of I/O software layer

device drivers