Computer Science - Paper 2 Fundementals of Computer Organisation and Architecture

Processor

A device that carries out computation on data by following instructions in order to produce an output

Main Memory

Stores data and instructions that will be used by the processor

RAM (Random Access Memory)

Stores data that can be read from and written to temporarily - has very quick access speeds

ROM (Read Only Memory)

Stores data and can be read from but not written to - it stores instructions related to setting up the computer

Memory map

Shows which programs are stored at which addresses

Bus

Microscopic parallel wires that transmit data between internal components

Data Bus

Transfers data between the processor and memory

I/O controller

Controls the flow of information between the processor and the input and output devices

Word length

The number of bits that a computer’s processor can handle at one time

Address Bus

Used to specify a physical address in memory so that the data bus can access it - only travels in one direction , processor into memory

Addressable Memory

The concept that data and instructions are stored in memory using discrete addresses

Control Bus

Used to transmit control signals between the processor and other components

Von Neumann architecture

A technique for bulding a processor where data and instructions are stored in the same memory and are addressed via the same buses

Harvard architecture

A technique for building a processor that uses seperate buses and memory for data and instructions

Stored program concept

The idea that instructions and data are stored together in memory and are fetched serially by a processor

Control Unit

Sends control signals that coordinate activity on the CPU and decode instructions

ALU (Arithmetic Logic Unit)

Carries out logical and arithmetic operations

Clock

Generates a pulse which is used to synchronise the components of a computer

Register

A small section of temporary storage that is part of the processor. it stores data and instructions during the FDE cycle

Status Register

Stores infromation about the current state of the processor - for example, if an overflow error has occured during an arithmetic operation

Interrupt Register

Stores details of any signals that have been received by the other components

CIR (Current Instruction Register)

Register that stores the instructions that the CPU is currently decoding/executing

PC (Program Counter)

Stores the address of the next instruction to be executed

MBR (Memory Buffer Register)

Stores the data that is currently being written to or read from by the CPU

MAR (Memory Address Register)

Register that stores the address of the data that is currently being processed by the CPU

Factors affecting CPU performance

Bus Width, Clock Speed, Number of cores, Cache size, Word length

Interrupt

A signal sent by a device or program to the processor, requesting its attention

ISR (Internet Service Routine)

Calls the correct routine required to handle a specific interrupt

Vectored interrupt mechanism

ISRs are stored in a memory address. Each type of interrupt will have a vector/memory address pointing to the address in which the specific ISR is stored.