CS 2506 Computer Science Final Exam Flashcards

PERFORMANCE UNIT STARTS HERE

PERFORMANCE UNIT STARTS HERE

What is response time?

How long a program takes to run

Ex. 3 seconds

What is throughput?

Total work done per unit time

Ex. 10 instructions per hour

How to find speed up of one program compared to another?

What is elapsed time?

Toatal response time for all aspects such as processiong, I/O, idle time

(not as important as CPU time)

What is CPU time?

Time spent processing a given job?

Cycles per second and instructions per second have a ___ correlation

Direct, Positive correlation

The term for "periods per second" is known as ___ ___

and is measured in

Clock frequency OR Clock Rate

Hz = "per second"

What is a clock period and what is its unit of measurement?

duration of a clock cycle

seconds/period

Clock period and clock frequency have an ___ relationship

inverse

What is the formla for CPU time?

CPU Clock Cycles x Clock Cycle Time (Clock Period)

OR

CPU Clock Cycles / Clock Rate (Frequency)

When asking how fast must Computer B be, the question is referring to?

Clcok Rate

What does CPI stand for?

Cycles per instruction

How do clock cyles, CPI, and instruction count relate?

CPI = clock cycles / instruction count

Clock cycles = CPI x Instruction Count

How is CPU time related to Instruction Count, CPI, and Clock Cyles

CPU Time = Instruction Count x CPI x Clock Cyles

What is Ahmdal's Law?

Timproved = Taffected/improvement factor Tunaffected

If 20% of our program has a 2.5x speedup then

Timproved = 20/2.5 + 80

SINGLE-CYCLE DATAPATH AND PIPELINING STARTS HERE

SINGLE-CYCLE DATAPATH AND PIPELINING STARTS HERE

How can we create better performance?

Reduce instruction count

and CPI

Improve cycle time

Summarize simple instruction execution?

1. Program Counter (PC) stores address of next instruction

2. Goes to instruction memory and grabs insturction

3. Parse instruction into register numbers and read instruction from register file (if there is an immediate, put into ALU)

If arithmetic/logic instruction: go to ALU, return result and write it into register file

If Memory instruction: use ALU to compute desired address (ex. lw x5 12(x6) )

if branch: ALU subtracts 2 register and see if rs1-rs2 == 0 and decided to branch by updating Program counter target address such as with PC + 4

List the types of logical gates

AND

NAND

OR

ADDER

MULTIPLEXER

ARITHMETIC/LOGIC ake ALU

ALU is like MUX but with functions as deciders such as exponents, multiplcation, etc.

What are sequential elements and what do they do?

Where data is stored

2 inputs: data and clock

When clock hits 1 data flows out and into combinational element

How do sequential elements relate to write controls?

3 inputs: data, write, clock

1 output: Q

When write is 1, data flows in, when clock cyles is 1 data flows out

What are combinational elements used for?

Doing some operation on data that then gets stored back into a sequential element

During Instruction Fetch, how many bits are passed into Instruction Memory?

How many bits the processor is (usually 64)

During Instruction Fetch, how many bits of an instruction are passed out?

32 bits (usually half of Instruction Memory)

Where does oppcode go?

Control

Define the process for R - format instructions

1. Breaks down 32 bit instruction

2. Rs1 goes into Read Register 1

3. Rs2 goes into Read Register 2

4. Register file looks up related register

5. Loads date into Read Data 1 and Read Data 2 into ALu

6. ALU adds, subtracts, and, ors the operation

7. Y signal gets result and puts into write data

8. Rd goes into write data and gets written into

9. Oppcodes goes into control and sends 1 into regWrite because you are writing into Rd

Define the process for Load/Store - format instructions

1. Extracts address (from register file in (i think r2) ) and immediate and puts into ALU

2. ALU puts address ("ADDR") into Data Memory

3. Data Memory goes to address.

Imm Gen extracts instruction to decipher between lw and sw.

4. If lw, then MemRead = 1, RegWrite = 1 ( and MemWrite must = 0) goes to data

5. If sw, then WriteData = 1, RegWrite = 0, MemRead = does not care, goes to data

5. Data written in REG file

Define the process for Branch Format instructions

beq x5, x6, LABEL

LABEL is just an immediate like 16

1. Break down 32 bit instruction

2. x5 -> Read register 1 , x6 Read register 2

3. Gets data associated with those register and put those into Read data 1 and Read data 2

4. Both go into ALU, x5 - x6 == 0?

Yes -> sends zero control signal

5. Sends immediate into Immediate Generator, then into Shifter that multiplies by 2, goes into 32 + PC adder which creates branch target

6. Puts branch target into PC after Branch Control and Zero signal sends their signals into AND

HAZARDS START HERE

HAZARDS START HERE

What is a data hazard?

instruction writes

2 or less cycles later

instruction reads

What is a control hazard?