chapter 6-8 itec 1000

Central Processing Unit (CPU)

The primary component of a computer that performs calculations and carries out instructions.

Registers

Small, permanent storage locations within the CPU used for specific functions, manipulated directly by the Control Unit.

Arithmetic Logic Unit (ALU)

A component of the CPU that performs arithmetic calculations and logical operations.

Control Unit (CU)

The part of the CPU that fetches instructions from memory, decodes them, and issues commands to other parts of the CPU.

Fetch-Execute Cycle

The two-step process where the CPU retrieves an instruction from memory and then executes it.

Memory Management Unit (MMU)

A subcomponent of CPU that supervises fetching instructions and data from memory.

Dynamic RAM (DRAM)

A type of volatile memory that must be refreshed thousands of times each second.

Static RAM (SRAM)

A type of volatile memory that is faster and more expensive than DRAM, often used in cache memory.

Read-Only Memory (ROM)

Nonvolatile memory that holds software that does not change, such as firmware.

Program Counter (PC)

A register in the CPU that holds the address of the next instruction to be executed.

Memory Address Register (MAR)

A register that holds the address of the memory location to be accessed.

Memory Data Register (MDR)

A register that temporarily holds data being transferred to or from memory.

Instruction Register (IR)

A register that holds the instruction currently being executed.

Volatile Memory

Memory that loses its content when power is turned off.

Nonvolatile Memory

Memory that retains its content even when the power is turned off.

Instruction Set

The collection of instructions that a CPU can execute.

Push and Pop

Operations associated with stack instructions, where 'push' adds an item to the stack and 'pop' removes the top item.

Stack

A data structure that uses the Last In First Out (LIFO) method for organizing information.

Data Movement Instructions

Instructions that involve transferring data between memory and registers.

Subroutine

A set of instructions designed to perform a frequently used operation within a program.

Flags

One-bit Boolean variables in the status registers used to track conditions like arithmetic carry.

Bit Manipulation Instructions

Instructions that perform operations on bits, such as shifting and rotating.

Complex Instruction Set Computer (CISC)

A CPU architecture with a large set of instructions that can execute complex tasks with fewer lines of assembly code.

Reduced Instruction Set Computer (RISC)

A CPU architecture that uses a small, highly optimized instruction set designed for high performance.

Fetch-Execute Cycle

The fundamental process of the CPU where an instruction is fetched from memory, decoded, and then executed.

Pipelining

A technique used in CPU architecture to allow multiple instruction fetch-execute cycles to overlap, improving throughput.

Superscalar Processing

A CPU architecture that allows multiple instructions to be processed simultaneously in a single clock cycle.

Cache Memory

A small, high-speed storage area that temporarily holds frequently accessed data and instructions to speed up processes.

Memory Interleaving

A technique that partitions memory into subsections to enhance memory access speeds for reading and writing data.

Branch Prediction

A technique used in CPU architecture to guess the direction of a branch (which instruction should be executed next) to improve execution efficiency.

Hit Ratio

The fraction of memory accesses that successfully retrieve data from the cache, indicating cache performance.

Symmetrical Multiprocessing (SMP)

A type of multiprocessing where each CPU has equal access to the system's resources, offering reliability and balanced workload.

I/O (Input/Output) Devices

Hardware components that allow a computer to communicate with the outside world, such as keyboards, mice, printers, and storage devices.

Interrupts

Signals that prompt the CPU to halt its current processes to address an event, allowing multitasking and better resource management.

Direct Memory Access (DMA)

A method for transferring data between memory and an I/O device directly, without CPU involvement in the data transfer.

Programmed I/O

A method of I/O where the CPU controls the transfer of data and instructions directly, typically involving individual word transfers.

I/O Controller

A device that manages the flow of data between the computer and peripheral devices, such as hard drives and printers.

Polling

A technique used to check the status of a device by querying each device in turn to see if it needs service.

Vector Interrupts

A method of handling interrupts by jumping directly to a specific routine based on the source of the interrupt.

CPU Cycle

The repetitive process of fetching an instruction, executing it, and checking for any interrupts.

Bus

A set of physical connections used to transfer data between various components inside or outside a computer.

Data Rate

The amount of data transferred per unit time, often measured in bits per second (bps).

Throughput

The rate at which data is successfully transferred from one location to another over a communication channel.

Bus Characteristics

Key features of a bus, including data width, addressing capacity, signal types, and throughput.

Peripheral Device

Any external device connected to the computer, such as a printer, scanner, or external hard drive.

Synchronization in I/O

The method by which devices with different speeds coordinate their operations to ensure data is accurately transferred.

Buffer

Temporary storage areas used to hold data while it is being transferred between two locations.