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Architecture
Set of data types, operations, and features at a particular level
Features seen by programmer are part of the architecture
Ex: amount of memory available
Implementation aspects are not part of the architecture
Ex: type of chip technology used to implement memory
Levels of Architecture
Level 0 - Digital logic level
Level 1 - Microarchitecture
Level 2 - ISA: Instruction et architecture (machine language level)
Level 3 - Operating system
Level 4 - Assembly language
Level 5 - Problem-oriented language
Data Bus
allows multiple devices to connect to a single wire (or set of wires for multiple bits) for the purpose of carrying a signal to an output location.
Tri-state buffer
A tri-state buffer is a digital circuit that can be in one of three states:
1. High (1)
2. Low (0)
3. High-impedance (Z) – effectively disconnected, allowing other devices to use the data bus without interference.
It’s commonly used in shared bus systems to control when a device is allowed to send data.