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Return to Zero
Data bits are transmitted within one cycle. Can transmit clock and data signals. A low level must be maintained.
Return to One
A high level needs to be maintained. As compared to RZ.
Non Return to Zero
Doesn’t need to return to zero. One cycle can be used to transmit data with a bandwidth utilization rate of 100%.
Delayed Non Return to Zero
NRZ waveform with time delay controlled by edge timing.
Surrounded by Complement
Combination of RZ and RO. Can have up to three edges within one cycle.
Impedance Drive ZD
Used to control pin opening and closing.
Device Under Test
The device being tested.
Device Power Supplies
Devices that directly provide voltage and current to the DUT.
Precision Measurement Unit
Used to accurately measure the DC characteristics of a device.
Per Pin Measurement Unit
PMU for each pin for measurement.
Device Interface Board
A special board that connects the DUT to the tester.
Probe Interface Board
Connects the tester to the wafer probe.
Prober Docking Plate
A mounting plate that holds the wafer probe station in place.
Probe Card
A board with tiny needles that touch the chip’s pads to test it while it’s still on the wafer.
Binning
Sorting chips after testing.
Manipulator
A mechanical arm that moves the test head around to reach the DUT.
Handler
A robot that picks up chips and places them in the tester.
Prober
A machine that moves the wafer so the probe card can the each chip accurately.
Hot Swtiching
Current carrying switching. The switching of relays while the current is flowing.
Latch up
When a pin is subjected to excessive voltage, it causes a large current to flow in CMOS devices.
Stuck-At-Fault
A signal pin that is stuck at a 0/1/Z level due to manufacturing defects. Causing a fault.
Hard Binning
Using handlers to class into two groups.
Soft Binning
Refers to recording and distinguishing defective products in software.
DC Parametrics Test
Performed to verify that DC Current and voltage parameters of the device.
AC Timing Test
The test carried out to verify the AC specifications of the devices.
Mixed Signal Test
Performed to validate the logic of both the analog and digital circuits of the DUT.