topic 1

what is the CPU 

the CPU is responsible for processing all the data within the computer , it fetches and carries out instructions by repeating fde cycle 

What is the CPU made up of 

ALU, CU and registers 

Registers

small high speed temporary storage / memory locations inside the CPU which are used for a single specific purpose

what are the 2 types of registers

general purpose registers, special purpose registers

what are general purpose registers used for

general purpose registers are used to hold data and instructions that are used frequently in a program

special purpose registers

have designated roles in the FDE cycle

ALU - arithmetic logic unit 

performs any arithmetic calculations or any logical comparisons 

Control Unit

where instructions are decoded. Also controls the data within the CPU and how it moves around

what do registers have faster access speed than.

RAM / secondary storage

name the special purpose registers

Program counter, Accumulator, MAR, MDR, CIR

program counter 

stores the address in memory of the next instruction to be fetched and increments by one to point to the next instruction in the program 

accumulator

this is where intermediate results are stored during calculations from the ALU.

where are most registers stored

the CU

what register isn’t stored in the CU, where is it stored ?

Accumulator, it is stored in the ALU

MAR

stores the memory address of data or instructions that need to be fetched from or written to the computers memory 

MDR

temporarily holds data retrieved from or about to be written to the computers memory 

CIR

loads instructions fetched from memory to split it into opcode and operand and then decode it.

buses

a set of parallel wires connecting two or more computer components

what are the system buses and what to they do 

Data bus, address bus and control bus. It connects the CPU to the main memory ( RAM ).

data bus

Carries data instructions  from the CPU to main memory

address bus

Carries addresses from the processor to the main memory or other input/output devices

control bus

sends control signals to determine whether other buses are in read or write mode.

what operations do the data and address buses carry out

read/write operations

what operations does the control bus carry out

it sends signals

what directions can the buses operate

address bus is one-directional

data and control bus are bi-directional

what generates the address that is then carried by the address bus 

the processor generates the address 

how does the CPU use the address bus 

it puts the memory address of the location it wants to access on the address bus which tells the main memory which memory location to look at 

how does the CPU use the data bus

• reads from memory , data bus carries data from memory to CPU

• writes to memory, data bus carries data from CPU - memory

what are all the signals the control bus can send

bus request, bus grant, memory write, memory read, interrupt request, clock

bus request

a device asking the use of the data bus

bus grant 

the cpu granting access to the data bus 

memory write

causes data on the data bus to be written into addressed loca

memory read

causes the data from memory to be places on the data bus

interrupt request

indicating that a device is requesting access to the cpu

clock request 

used to synchronise operations 

fetch stage of fde cycle 

• PC is loaded with 0

• address from PC is copied to the MAR

• data from the MAR is sent across the address bus with instructions to read the data sent across the control bus

• instruction held at that address is copied to MDR by the data bus

• pc increments by one and the value held in the MDR is copied to the CIR

decode phase of FDE cycle

the contents of the CIR are split into operand and opcode . It is sent to the CU to be decoded

execute phase of FDE cycle

instructions are excecuted:
INP , OUT, LDA, STA, ADD/SUB , BRA/BRZ/BRP

cache

a part of primary storage and is used to store frequently used data and instructions. used as its closer to the CPU than RAM and therefore is faster to retrieve data from.

What happens when INP is executed

value being inputted will be stored in the accumulator

what happens when OUT is executed 

value currently in the Accumulator is sent to the output device

what happens when LDA is executed

value is loaded from the RAM, it will be sent across the data bus from the address location in the MAR to the MDR

what happens when STA is executed

If a value is to be stored, it will take the value from the ACC, send it to the MDR and then send it across the data bus to RAM to the address location in the MAR

what happens when ADD/SUB is executed

If a value is being added to or subtracted from another value the values will be passed to the ALU, the operation will be carried out, and the result will be stored in the ACC

what happens when BRA/BRZ/BRP is executed

if the little man computer code is to branch, the comparison will take place in the ALU 

what 3 things affect CPU performance

clock speed, number of cores, cache

what are state changes in the CPU

a clock in the computer controls operations in the CPU and repeatedly changes from 1 to 0 and so on. This is a state change and represents one fde cycle .

clock speed

measure of how many state changes the CPU performs per second 

how does clock speed affect performance

higher clock speed means that the computer performs more cycles and has greater performance but risks overclocking

what is overclocking

manually increase the clock speed of a cpu beyond what is recommended by the manufacturer, can cause overheating and damage to the CPU

core

complete set of CPU components, a processing unit within the CPU

how does number of cores affect CPU performance 

the more cores , the faster the CPU performance as more instructions can be excecuted and ran simultaneously. 

why might number of cores not always improve CPU performance

some programs may not be able to handle multiple cores and sometimes one core might have to wait on the other core and time spent organising tasks between cores.

how can cache size affect CPU performance

The more cache there is, the more data can be stored which speeds up the performance of the CPU. However if the cache size is too large, performance may not increase due to increased time trying to locate instructions.

pipelining

the process of carrying out multiple instructions . One instruction can be fetched while the previous one is being decoded and the one before is being executed

how many levels of cache are there

3

level 1 cache

small and fast

1 level-1 cache for each core

split into data and instruction cache so data and instructions can be fetched simultaneously

level 2 cache

bigger than level 1 cache but not as fast

shared between cores

where is the level 1 and 2 cache stored

processor

level 3 cache

slower and larger than level 2

sits on motherboard

parallel processing 

using several processor cores working at the same time 

what is pipelining seperated into

instruction and arithmetic pipelining

instruction pipelining

separating out the instruction into fetching, decoding, and executing.

arithmetic pipelining

breaking down the arithmetic operations and overlapping them as they are performed.

how does pipelining improve performance 

pipelinign reduces latency by minimising the time the CPU is idle waiting for the next instruction. This increases excecution speed as the next instruction is fetched while the current one is decoded/excecuted. 

flushing

clearing out instructions that are currently in the pipeline — usually because they are no longer valid or must not be executed

name an example of flushing

wrong branch prediction . branch instructions are either taken or not taken, CPU often guesses which way to go and sometimes its wrong

what are the 2 common types of computer architecture

Von Nuemann, Harvard

computer architecture 

how computer uses its components and instructions to make the computer function

differences between harvard and von nuemann architecture

Von nuemann has shared memory and data bus for both data and instructions. Harvard architecture has seperate memories for data and instructions and seperate buses for data and instructions

similarities between harvard and von nuemann

both have CU and ALU and other special registers

use of harvard architecture

embedded systems

use of. von nuemann archtiecture 

most modern computers and microcontrollers

advantages of von nuemann architecture

• cheaper to develop as the control unit is easier to design

• programs can be optimised in size - amount of storage or memory space the program takes can be reduced

• programming is less complex than harvard

advantages of harvard architecture

• quicker execution as data and instructions can be fetched in parallel

• memories can be different sizes which can make more efficient use of space

• simplifies pipelining of instructions and data

contemporary processing

contemporary processors use a combination of Harvard and Von Nuemann architecture. VN for data and instructions in main memory but Harvard to divide the cache into instruction and data cache

RISC - reduced instruction set computer

• smaller instruction set with simple instructions

• each instruction takes one clock cycle to excecute 

CISC - complex instruction set computer

• larger instruction set which includes more complex instructions

• instructions can take more than one clock cycle to execute

differences between RISC and CISC processors

• compiler has to do more work in RISC processor to translate high level code into machine code and are more complicated

• RISC requires more RAM to store the code

• CISC has more general purpose registers ,transistors and addressing modes

what is an addressing mode

the method a processor uses to specify the location of an operand (data) used in an instruction

advantages of RISC over CISC

• requires less power

• costs less to manufacture

• better for pipelining as 1 instruction = 1 cycle

GPU - graphical processing unit

Specialised electronic circuit designed to accelerate graphics rendering and processing tasks to reduce load on the CPU

what are the main tasks the GPU carries out and why are these tasks not carried out by the CPU?

graphics rendering and image and video processing. GPUs are designed differently allowing them to process graphics quickly.

advantages of CPU over GPU

• good for general tasks

• good for operating complex operations on small amounts of data

• has a small number of cores that run faster

advantages of GPU over CPU

• good for specialised tasks

• has thousands of cores that run slower

• can perform a simple instruciton on a large amount of data simultaneoulsy

• good for simple operations on large data sets

GPUs are a type of co-processor, what is a co-processor?

a secondary processor designed to supplement the activities of the primary processor

what devices use CISC processors

micro controllers and embedded systems

what devices use RISC processors

common computers

what can the GPU do besides graphics

3D modelling, data modelling, financial modelling , data mining, machine learning

what is multicore processing

there are multiple cores in a CPU chip. each core has its own FDE cycle and performs cycles. They use a shared cache and the cores communicate with each other.

Parallel processing 

the processing of program instructions by dividing them between multiple processors or processor cores

how can parallel processing be achieved

• assigning seperate processors or processing cores to the stages of the FDE cycle . one core is fetching, another decodes and another executes

• the main processor or processing core fetches and decodes an instruction and then farms off the various parts of the program to other processing units

what is a limitation of parallel processing

• the task being carried out

• if the software can be designed and written to make use of parallel processing

benefits of multicore processors

• multitasking - each core can work on a different task

• background tasks can be performed on serperate cores

• improved responsiveness, if a program becomes unresponsive it wont slow the computer down as the other cores continue

threading

dividing a program into smaller parts (called threads) that can run at the same time.