Digital Logic Midterm

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10 Terms

1
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Explain the behavior of an encoder. What are its inputs and outputs?

An encoder is a digital circuit that converts a set of binary inputs into a unique binary code. The binary code represents the position of the input and is used to identify the specific input that it active. (The opposite of a decoder) It has a maximum of 2^n input lines and ‘n’ output lines, hence it encodes the information from 2^n inputs into an n-bit code.

  • A 4 to 2 encoder has 4 (2²) inputs and 2 (n=2) outputs

  • A 8 to 3 encoder has 8 (2³) inputs and 3 (n=3) outputs

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Explain the behavior of a decoder. What are its inputs and outputs?

A decoder is used to convert binary-coded inputs into a unique set of outputs. (The opposite of an encoder) A decoder takes n inputs and has 2^n outputs. It is mainly used to convert binary coded data into multiple outputs.

  • 2 bit decoder has 2 inputs and 4 outputs (2² = 4)

  • 4 bit decoder has 4 inputs and 16 outputs (2^4 = 16)

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What is an S-Latch?

  • Set-Reset Latch

  • Two inputs: S (Set) and R (Reset)

  • The S input sets the output to 1

  • The R input resets the input to 0

  • When both S and R are at 1, the latch is said to be in an “undefined” state

S | R | Q | Q’

————————--

0 | 0 | latch | latch hold (no change)

0 | 1 | 0 | 1 Reset

1 | 0 | 1 | 0 Set

1 | 1 | 0 | 0 Invalid

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What is a flip flop?

A circuit that maintains a state until directed by input to change the state. A flip-flop is a component that is used to store one single bit of information.

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JK Flip Flop

  • Input Set (J) and Reset (K)

J | K | Q | Q+

0 | x | 0 | 0

1 | x | 0 | 1

x | 0 | 1 | 1

x | 1 | 1 | 0

  1. J = 0, K = 0 (No Change): Here, the output Q(n+1) stays the same. This means the next state (Q(n+1)) is just like the current one (Qn).

  2. J = 0, K = 1 (Reset State): In this case, the next state is reset to 0 (Q(n+1) = 0), no matter what the current state is (Qn).

  3. J = 1, K = 0 (Set State): Now, the next state gets set to 1 (Q(n+1) = 1), again, no matter what’s happening in the current state (Qn).

  4. J = 1, K = 1 (Toggle State): In this state, the output Q(n+1) toggles. So if the current state is set (Qn = 1), it will change to 0 (Q(n+1) = 0). If it’s reset (Qn = 0), then it flips to 1 (Q(n+1) = 1).

<ul><li><p>Input Set (J) and Reset (K)</p></li></ul><p>J | K | Q | Q+</p><p>0 | x | 0  | 0</p><p>1 | x | 0  | 1</p><p>x | 0 | 1  | 1</p><p>x | 1 | 1  | 0</p><ol><li><p><span>J = 0, K = 0 (No Change): Here, the output Q(n+1) stays the same. This means the next state (Q(n+1)) is just like the current one (Qn).</span></p></li><li><p><span>J = 0, K = 1 (Reset State): In this case, the next state is reset to 0 (Q(n+1) = 0), no matter what the current state is (Qn).</span></p></li><li><p><span>J = 1, K = 0 (Set State): Now, the next state gets set to 1 (Q(n+1) = 1), again, no matter what’s happening in the current state (Qn).</span></p></li><li><p><span>J = 1, K = 1 (Toggle State): In this state, the output Q(n+1) toggles. So if the current state is set (Qn = 1), it will change to 0 (Q(n+1) = 0). If it’s reset (Qn = 0), then it flips to 1 (Q(n+1) = 1).</span></p></li></ol><img src="https://knowt-user-attachments.s3.amazonaws.com/0831e276-1b03-4f65-b8d4-f7f4ce4b8590.png" data-width="100%" data-align="center"><p></p>
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T Flip Flop

  • Toggle Flip Flop

  • It’s able to toggle its output depending upon the input

  • Toggle indicates that the bit will be flipped (0 to 1 or 1 to 0)

T | Q | Q+

0 | 0 | 0

1 | 0 | 1

0 | 1 | 1

1 | 1 | 0

<ul><li><p>Toggle Flip Flop</p></li><li><p>It’s able to toggle its output depending upon the input</p></li><li><p>Toggle indicates that the bit will be flipped (0 to 1 or 1 to 0)</p></li></ul><p>T | Q | Q+</p><p>0 | 0 | 0</p><p>1 | 0 | 1</p><p>0 | 1 | 1</p><p>1 | 1 | 0</p>
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D Flip Flop

  • Delay flip flop or data flip flop

  • When clock input is high, the data is transferred to the output of the flip flop.

  • When the clock input is low, the output of the flip flop is held in its previous state.

D | Q | Q+

0 | 0 | 0 

1 | 0 | 1 

0 | 1 | 0

1 | 1 | 1 

Q+ = D

<ul><li><p>Delay flip flop or data flip flop</p></li><li><p><span>When clock input is high, the data is transferred to the output of the flip flop.</span></p></li><li><p><span>When the clock input is low, the output of the flip flop is held in its previous state.</span></p></li></ul><p>D | Q | Q+</p><p>0 | 0 | 0&nbsp;</p><p>1 | 0 | 1&nbsp;</p><p>0 | 1 |&nbsp;0</p><p>1 | 1 | 1&nbsp;</p><p>Q+ = D </p>
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What is the purpose of the clock signal?

  • Serves as a metronome for digital circuits

  • ensures that all components operate in sync

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What is the difference between an asynchronous and synchronous component?

  • Synchronous communication requires the sender to wait for an immediate response, making it suitable for real-time interactions.

  • Synchronous = clock

  • Asynchronous communication, on the other hand, allows the sender to proceed without waiting, enabling better scalability and flexibility in distributed systems.

<ul><li><p><span>Synchronous communication requires the sender to wait for an immediate response, making it suitable for real-time interactions.</span></p></li><li><p><span>Synchronous = clock</span></p></li><li><p><span>Asynchronous communication, on the other hand, allows the sender to proceed without waiting, enabling better scalability and flexibility in distributed systems.</span></p></li></ul><p></p>
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Multiplexers

Equation for a 2×1 multiplexer: Y = (D0 S’) + (D1 S)

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