1.1 Architecture of the CPU

CPU

CPU

Processes simple instructions one at a time

Control Unit

Directs the flow of the data and controls activities taking place within and outside the CPU

Arithmetic Logic Unit

Carries out mathematical calculations AND logic operations (Boolean).

Registers

High speed memory that stores data in the CPU

Cache

Slower to access than registers, but high speed RAM built directly into the CPU that stores frequently used instructions.

Accumulator

Where the arithmetic results are temporarily stored from the ALU

Program Counter

Stores the next instruction that needs to be fetched.

Memory Data Register

Stores the data fetched from memory

Memory Address Register

Stores the address of the current/ next instruction that needs to be fetched.

FETCH STAGE

Memory address is copied from the PC to the MAR

MAR locates address and requires MDR to follow.

Increment PC ready for the next instruction.

DECODE

Instruction in MDR is decoded by the CU.

CU prepares for next stage.

(eg loading values into MAR or MDR)

EXECUTE

Instruction is performed

Von Neumann Architecture

Program instructions and data are stored in the same memory.