Lecture Notes on Processor Architectures

Flashcards covering key concepts from processor architectures, primarily focusing on RISC and CISC characteristics.

RISC

Reduced Instruction Set Computer, emphasizing a smaller number of instructions for greater execution efficiency.

CISC

Complex Instruction Set Computer, characterized by a large number of complex instructions.

ARM

A family of computer architectures for RISC-based processors, widely used in mobile and embedded devices.

Fetch-Decode-Execute Cycle

The process through which a computer retrieves, decodes, and executes instructions.

Pipeline

A technique where multiple instruction phases are overlapped to improve execution speed.

ALU

Arithmetic Logic Unit, a digital circuit used to perform arithmetic and logic operations.

Instruction Set

A collection of instructions that a processor can execute.

Clock Rate

The speed at which a microprocessor can execute instructions, usually measured in GHz.

CPI

Cycles Per Instruction, a metric that measures the average number of clock cycles each instruction takes to execute.

Load/Store Architecture

In RISC, where the ALU cannot directly access memory; all data must be loaded into registers first.

Barrel Shifter

A digital circuit that can shift the bits of a number rapidly, enabling fast arithmetic and logical operations.

Micro-ops

Simplified operations into which complex instructions are broken down for execution.

Smart Charger

A device that manages power effectively, offering performance capabilities that surpass older computing systems.

Program Counter (PC)

A register that holds the address of the next instruction to be executed.