3 - Processors and the instruction cycle

What is the difference between volatile vs non-volatile storage?

• Volatile storage requires constant power to retain data while non-volatile does not

What are examples of non-volatile storages?

• Magnetic storage (eg Hard drives)

• Solid-State Drives (SSDs) and flash memory

• Optical storage (eg CDs, DVDs_

• Non-volatile RAM (NVRAM)

What is the difference between primary storage devices and secondary/tertiary storage devices?

Primary storage devices are purely electronic, while secondary and tertiary storage devices often rely on mechanical motion and thus are much slower

What is the insturcton cycle?

• The machine language instructions which consitute a program are stored in memory (copied from disk to memory when the program is loaded)

• While the system is recieving power, the control unit in the CPU is constantly performing the instruction cycle to fetch and execute instruction

• Repeat

  • Fetch the next instruction

  • Execute that instruction

What are the special registers?

• Special registers in the control unit are used to manage the instruction cycle, such as the program counter (PC) and insturction register (IR)

• Fetch phase

  • RAM[PC] ==> IR

• Execute Phase

  • Decode IR

  • Take appropriate action

  • Update PC

What is an instruction trace? How do they act in loops? What are they used for?

• An instruction trace is a list of the addresses which were accessed as a program executed

  • It contains each address which was accessed and the machine lanugage instruction, which is in memory at that address

• The traces show step by step which insturctions were executed

• Instruction which are inside loops WILL appear more than once (once for every time the insturction was executed)

• Used for: problem idagnosing, performance measuremnt, and how to view operation on a system level

Why does the OS rely on the hardware to perform all its work?

• Desried new capabilites of an OS influence the hardware on which the OS runs (the OS and architecture evolve together)

• Examples: privileged instructions, interrups, DMA

What are privileged instructions? What are some examples?

• Priveledges instructions are machine language instructions which can only be executed while the processor is in privleged mode

  • Kernel mode, supervisor mode

  • Security: Only system-level code such as OS code can perform operations that count affect systems stabiltiy/security

  • Examples: Shut down the system, change contents of a control register

When is the processor in privleged mode?

• When functions in the OS kernel are executing

What happens if there;s an attempt to execute a privileged instruction in a non-privileged mode?

• An attempt to execute a priveleged instruction in non-priveleged mode causes a runtime error

What is a hradware interrupt? What are some examples?

• A mechanism to allow a hardware module to get hte attention of the OS

  • Ex: I/o device signals that operation is complete; a tiemer signals that an interval is over; network controller signals that packet as arrived

• They are critical to the operation of modern procesers and an integral part of OS design

When can interrupts occur?

• At any time, so they must be synchonrized with the system clock

What is the revised instruction cycte?

• Fetch instruction

• Execute instruction

• If interrupts enabled, check for interrupts

What happens when an interrupt occurs?

• The OS kernel detrmines the nature of the interrupt and performs the necessary actions to handle that interrupt

• The kernel is a set of functions, so it uses the CPU to do an wokr

• The state of the process that was running when the interrupt occured must be saved so that it can be resume execution later

What are the register sets the processer has?

• A set of general purpose registers for computations

• A smaller set of control registers such as PC and Program Status Register (PCR)

What porcess state must be preserved? What does the hardware vs kernel preserve?

• PC - address where interrupt occurs

• PSR - status bits (including user/kernel mode)

• Any general purpose registers which are used by the kernel function to handle the interrupt

• The hadrware automatially saves PC and PSR; kernel function saves any other registers

What is the interrupt service routing (ISR)?

• The kernel contains a serparte ISR fore ach type of interrupt

• The address of the approtiate ISR is in atable for each interrupt request (IRQ); the hardware uses the interrupt number as the index

• How the hardware extracts the address of the ISR varies between architecture

What happens when an interrupt occurs?

When an interrupt occurs the hardware does the following simuultaneously:

• Acknowledges the interrupt

• Turns kernel mode on

• Saves the PC and PSR

• Palces the address of the ISR into the PC

Since the PC now contains the entry point of an interrupt service routine, that function is executed

Wha does each ISR do?

• Hardware turned on kernel mode, saved the PC and PSR form the interrupted process and jumped ot the approiate ISR

each ISR does the following:

• Fish saving the state of the interrupted process

• Process itnerrupt

• Restore the state of the interupted process

• Restore old PC and old PSR

Note: now back in the interrupted process (old PC) and back in user mode (old PSR)

What are the different types of interrupts?

• Hardware interrupt (aychrnous) - signal from device

• Software interrupt (sychrnous) - signal form current process

• Exception - error caused by current instruction

• trap - specific machine language instruction to cause interrupt in a controlled way

What are some hardware interrupt examples?

• I/O (keyboard key presses, disk operation comleted)

• Timer (time slice completed)

• Hardware failure (memory parity error)

What are some examples of software interrupts?

• Exceptions (segmentaiton fualt , divide by zero)

• Trap (control transfer instruction to request interrupt)

What are the two main strategies when mroe than one interrupt occurs?

• Sequential interrupt orcessing

• Nesting interrupt processing

  • Nesting alllows processing in priotity order (each type of interrupt is assigned a relative proiortiy)