Registers

Register

A set of n flip-flops used to store n bits (an n-bit number). All flip-flops share a common clock.

Shift Register

A register that shifts its stored bits left or right on each clock edge, inserting a new bit at one end.

Example of a Right-Shift Register

• Data bits enter serially via In.

• On each positive clock edge, contents shift right by 1.

• Example sequence: In = 1,0,1,1,1,0,0,0 → bits appear across 4 flip-flops over 8 cycles.

Level-sensitive latches would allow input changes to propagate through multiple stages during Clk=1, breaking the shift behavior. Edge-triggered flip-flops avoid this.

Why flip-flops and why not latches?

Parallel Data Transfer

n-bits transferred simultaneously over n wires. (Is faster but requires more energy and more hardware)

Serial Data Transfer

n-bit transferred sequentially over 1 wire in n clock cycles. Is slower and requires fewer wires.

Serial-to-Parallel Converter

• Loads data serially into a shift register

• After n clock cycles, the full n-bit value is available at the outputs in parallel.

Parallel-to-Serial Converter

• Loads n-bits into a register in parallel.

• Shifts them out serially over n clock cycles.

Shift/Load = 0

Control signal where the register operates as a shift register (serial shifting)

Shift/Load = 1

Control signal where the parallel input gets loaded into the register (parallel load)

Register Outputs (Q3-Q0)

• Provide access to stored n-bit number.

• Can be read in parallel (all at once) or serially (bit-by-bit through Q)