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What does I2C stand for, and who developed it
Inter-Integrated Circuit, developed by Philips Semiconductor in 1982
What are the two main lines in I2C communication
SDA (Serial Data Line) and SCL (Serial Clock Line)
What are the standard speeds for I2C communication modes
Standard Mode: 100 kbps, Fast Mode: 400 kbps, Fast Mode Plus: 1 Mbps, High-Speed Mode: 3.4 Mbps, Ultra-Fast Mode: 5 Mbps
What is the role of the controller and target in I2C
The controller initiates communication, and the target responds to the controller’s commands
What is the purpose of a START condition in I2C
To initiate communication, where the controller pulls SDA low while SCL is high
What is the purpose of a STOP condition in I2C
To terminate communication, where the controller releases SDA while SCL is high
How does an I2C controller signal if it wants to read or write
By setting the R/W bit (1 for read, 0 for write) following the address frame
What are pull-up resistors used for in I2C
To ensure SDA and SCL lines return to high when no device is pulling them low
Why is I2C called a half-duplex protocol
It can only send or receive data at any one time, not both simultaneously
What does an ACK (Acknowledge) signal represent in I2C
It indicates that the target device successfully received the byte of data
What is the purpose of an open-drain configuration in I2C
It allows multiple devices to share the same bus by pulling the line low when necessary
What is the difference between open-drain and push-pull outputs
Open-drain allows multiple devices to pull the bus low without causing a conflict, while push-pull can cause contention
What is arbitration in I2C, and why is it needed
Arbitration ensures that only one controller takes control of the bus when multiple controllers attempt to communicate simultaneously
What happens during a repeated START condition in I2C
The controller sends another START without releasing the bus, allowing for continued communication
Why is clock stretching used in I2C
To allow a slower target to hold SCL low, delaying the controller until it is ready
What does a NACK (Not Acknowledge) signal indicate
It shows that the target did not receive data properly or signals the end of data transfer
What is the structure of an address frame in I2C
A 7- or 10-bit address followed by the R/W bit
How does the SDA line behave to signal a logical ‘1’ or ‘0’
SDA is high for a ‘1’ during the SCL pulse and low for a ‘0’
What might cause communication failure on the I2C bus
Missing pull-up resistors, incorrect addresses, or signal noise
How does the I2C protocol ensure compatibility with different voltage levels
By using pull-up resistors that adjust voltage to the device’s supply level
What is a timing diagram in I2C, and why is it important
It shows the relationship between SDA and SCL, ensuring correct data timing and synchronization
How does I2C handle multiple devices on the same bus
Each device has a unique address, allowing the controller to select one at a time
What is a data frame in I2C
An 8-bit data byte followed by an ACK or NACK
What happens if two devices on the I2C bus have the same address
Address conflicts arise, causing communication errors
What is the role of the R/W bit in the address frame
It specifies whether the controller wants to read from (1) or write to (0) the target
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