EXAM 2 CSE 261 DIGITAL LOGIC

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Last updated 4:07 PM on 4/1/26
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40 Terms

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Sequential Circuit

A type of circuit where the output is determined by both the current inputs and the past sequence of inputs, making timing and order crucial in the system's operation.

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SR Latch

A fundamental bistable storage element with two inputs (Set and Reset) that can hold a single bit of data: it is set to one when the Set input is activated and reset to zero when the Reset input is activated.

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D Latch

A level-sensitive device that captures the input value (D) when the control signal (C) is high and retains that value when the control signal is low, allowing for temporary storage in a sequential circuit.

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D Flip-Flop

An edge-triggered storage element that captures the value of input D only on the rising edge of a clock signal, ensuring that data changes are synchronized with the clock.

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Finite-State Machine (FSM)

A computational model consisting of a finite number of states, transitions between those states based on inputs, and outputs, used for modeling the behavior of sequential systems.

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Race Condition

A problematic scenario in sequential circuits where the output varies due to the timing of input changes, causing unpredictability due to multiple signals being processed simultaneously.

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Metastability

A state of uncertainty that occurs in digital circuits, particularly in flip-flops, when setup or hold time constraints are violated, leading to erratic output states.

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Glitches

Transient unwanted fluctuations in the output signals caused by propagation delays, leading to potential incorrect behavior in circuits.

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Boolean Equations

Mathematical expressions that represent the functions of digital circuits in terms of logical variables, reflecting how inputs correspond to outputs.

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Timing Diagrams

Visual representations that illustrate the states of signals over time in sequential circuits, aiding in the analysis of time-related behaviors and interactions.

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State Machine

A model used in computer science and engineering to design algorithms that operate through a series of defined states and transitions triggered by inputs.

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State Diagram

A graphical depiction of a state machine that illustrates all its states and transitions based on various conditions, facilitating understanding of the system's functionality.

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Moore Machine

A type of finite-state machine where the outputs are solely dependent on the current state and not influenced directly by the input signals.

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Mealy Machine

A variant of finite-state machines where the outputs are determined by both the current state and the current inputs, typically providing faster response to state changes.

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Transitions

Processes that describe how a state machine changes from one state to another, usually triggered by specific input conditions.

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Input Combination

A particular arrangement of input signals that activates a transition within a state machine, leading to a change in state.

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Ambiguous State

A situation in a state machine where a specific input can lead to multiple possible next states, complicating the machine's predictability.

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Gray-code Sequence

A binary numeral system in which two consecutive values differ by only one bit, minimizing the risk of errors during state transitions.

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Hazard

An unsafe condition in circuit design that can lead to incorrect outputs during transitions due to timing issues.

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Output Table

A structured grid that defines the outputs for a state machine based on its current state and input signals, aiding in the design and analysis of sequential circuits.

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Tail Lights Sequence

Specific operational modes of vehicle lights represented as distinct states in a state machine, providing clear indications during various vehicle operations.

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Circuit Block Diagram

A simplified illustration of an electrical circuit that shows the interconnections and relationships among different circuit components.

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Bistable Logic Elements

Feedback circuits capable of maintaining two distinct stable states, commonly used in memory applications.

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Clock Characteristics

The attributes of a clock signal, including parameters like frequency, duty cycle, and period, which are essential for the proper function of sequential logic.

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Setup Time

The minimum duration prior to a clock edge during which the input signal must remain stable to guarantee reliable data capture.

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Hold Time

The minimum duration immediately after a clock edge during which the input signal must stay constant to ensure data integrity in flip-flops.

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Characteristic Equations

Equations that model the next state of a flip-flop in relation to its current state and inputs, crucial for designing sequential circuits.

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Timing Parameters

Metrics in flip-flops that dictate the performance limits regarding propagation delay, minimum pulse width, setup time, and hold time.

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Scan Flip-Flop

A specialized flip-flop designed for testing purposes, capable of operating in both normal mode and test mode, enhancing diagnostic capabilities.

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Excitation Equations

Formulas that characterize the necessary input signals for achieving specific transitions in flip-flops, essential for designing sequential systems.

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State Transition Table

A comprehensive table that outlines possible states in a system, detailing corresponding actions or outputs in relation to various inputs.

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State Table

A tabular representation organizing the states of a state machine, encapsulating current states, inputs, next states, and outputs for clarity.

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Transition Equations

Mathematical expressions that detail the conditions required for a state machine to move from one state to another.

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State Register

A storage component that maintains the current state of a finite-state machine (FSM), fundamentally influencing the next state based on incoming inputs.

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Combinational Logic

Digital logic circuits where the output solely depends on the present input signals, without regard to any previous states or actions.

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Truth Table

A comprehensive representation of all possible input combinations for a digital circuit and their corresponding outputs, used to depict circuit behavior.

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Clock Cycle

One complete cycle of a clock signal that orchestrates the operations in sequential circuits, determining when state changes occur.

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Inputs

Signals that are supplied to a circuit or system, which dictate the behavior and output of state machines and sequential logic.

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Outputs

The results produced by a circuit or system in response to specific sets of inputs, forming the end-result of processing.

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Input Sequence

The chronological order in which input signals are input into a circuit, influencing the operational behavior and resultant state of the system.

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