Interview Prep

Power Electronics

How does a 3-phase inverter in a VFD generate variable-frequency AC output?

AC is rectified to DC and filtered into a DC bus. Three inverter legs (MOSFETs/IGBTs) switch using PWM (sine-PWM or SVPWM). Modulating the PWM duty cycle creates a sinusoidal waveform with controllable frequency and amplitude, and each leg is phase-shifted 120° to produce balanced 3-phase output.

What is gate charge (Qg) and why is it important?

Total charge needed to turn a MOSFET from OFF to ON. Determines switching speed, driver requirements, and switching losses. High Qg slows switching if the driver cannot source enough current, increasing losses and limiting frequency.

What causes voltage overshoot and ringing in a switching waveform?

LC resonance from parasitic inductance and capacitance in power and gate loops. High dV/dt and dI/dt excite oscillations. Mitigation: gate resistors, minimize loop inductance, snubbers, proper decoupling, and careful PCB layout.

What happens if switching frequency is increased too much?

Higher switching losses → heat in semiconductors, increased RMS current in DC bus capacitors → more ripple and shorter lifespan, higher EMI, driver stress. Must balance frequency with efficiency, reliability, and thermal limits.

Compare MOSFETs vs IGBTs for VFD applications.

MOSFETs: low voltage, high frequency, fast switching, low switching loss, conduction loss rises with current². IGBTs: high voltage/current, slower switching, lower conduction loss at high current, smoother waveform, limited high-frequency use.

Possible causes of IGBT overheating at currents below rating?

Excessive switching loss due to slow gate drive, parasitic ringing, shoot-through from dead-time errors, or inadequate heatsinking.

Why use PWM in a VFD instead of just switching at output frequency?

High-frequency PWM modulates the average voltage to approximate a sine wave. Reduces current/torque ripple, allows amplitude control (V/f), reduces harmonics, and enables efficient control without resistive losses.

Datasheet parameters: Rds(on), Qg, Coss, Vds,max — what do they mean?

Rds(on): On-resistance, affects conduction loss. Qg: Gate charge, affects switching speed and driver requirements. Coss: Output capacitance, affects switching loss and dV/dt stress. Vds,max: Maximum drain-source voltage, limits safe operating voltage.

What is a dead-time in an inverter and why is it important?

Time inserted between turning off one switch and turning on the complementary switch in a half-bridge to prevent shoot-through. Incorrect dead-time can cause conduction loss, ringing, or device failure.

Explain field-oriented control (FOC) at a high level.

Transforms 3-phase currents to dq frame (rotating reference), controlling torque and flux independently via decoupled current loops. Enables precise speed/torque control in motors.

What is CMTI (Common Mode Transient Immunity)?

A parameter for gate drivers indicating the maximum dV/dt the driver can tolerate between power and gate reference without mis-triggering. Important in high-speed inverter switching.

How do parasitic inductance and capacitance affect a VFD inverter?

They form LC resonances causing ringing and overshoot, increasing device stress, EMI, and losses. Minimized via layout optimization and careful component placement.

What is the tradeoff between switching speed and efficiency?

Faster switching → lower current ripple but higher switching losses and EMI. Slower switching → lower losses and EMI but more ripple. Must balance for thermal, EMI, and motor performance.

How does increasing switching frequency affect DC bus capacitors?

Increases RMS current → more heating → shorter lifespan, higher ripple voltage, and stress on capacitor dielectric.

Name key methods to reduce switching losses in MOSFETs or IGBTs.

Optimize gate drive voltage/current, minimize parasitic inductance, choose device with low Qg/Coss appropriate for frequency, optimize dead-time to prevent shoot-through.

Why do IGBTs produce smoother waveforms than MOSFETs?

Slower turn-on/off (minority-carrier tail current) → lower dV/dt → fewer harmonics → smoother voltage waveform, lower EMI.

How is switching loss calculated in a MOSFET or IGBT?

Approximate by integrating the instantaneous voltage × current during turn-on/off: P_sw = f_sw × (E_on + E_off), where E_on and E_off are the energy losses per switching event.

Name typical protection features in a VFD inverter.

Overcurrent/shoot-through protection, overvoltage / DC bus clamp, thermal protection, short-circuit / under-voltage detection.

What is the effect of parasitic inductance in the gate loop?

Increases ringing, slows switching if combined with gate resistor, can cause mis-triggering and extra switching loss.

Why is Rds(on) important in high-current MOSFETs?

Determines conduction loss: P_cond = I² × Rds(on). Lower Rds(on) reduces heat, especially at high currents.

Why is Coss important in switching applications?

Output capacitance affects switching energy: higher Coss increases E_sw = 0.5 × Coss × Vds² per transition.

What is Miller plateau and why does it matter?

Voltage range during MOSFET switching where gate voltage remains nearly constant while drain current rises. Determines switching time and losses.

Why is dead-time necessary in a half-bridge?

Prevents shoot-through by ensuring both high- and low-side switches are never on simultaneously.

How does switching frequency affect EMI?

Higher frequency → more high-frequency harmonics → increased EMI. Requires filtering or layout considerations.

What are common methods to reduce EMI in VFDs?

Snubbers, proper layout, twisted pair motor leads, common-mode chokes, shielding.

What is back-EMF in a motor and why does it matter in VFD design?

Voltage generated by motor motion opposing applied voltage. Affects current control, switching losses, and protection design.

What is the difference between hard-switching and soft-switching?

Hard-switching: device switches while voltage and current overlap → higher losses. Soft-switching: switching occurs at zero voltage or zero current → reduces losses.

Why might an IGBT fail in a VFD inverter?

Excessive switching loss, thermal runaway, shoot-through, parasitic ringing, or exceeding V_CE_max.

What is the effect of slow gate drive on switching devices?

Increases turn-on/off time → higher switching loss, more heat, more EMI.

Why is gate resistor value critical?

Controls dV/dt/dI/dt, limits ringing, balances switching speed vs losses.

What is shoot-through and how does it occur?

Both high- and low-side switches in a half-bridge conduct simultaneously, often due to insufficient dead-time → catastrophic loss.

How does series gate resistance affect MOSFET switching?

Slows turn-on/off, reduces ringing, increases switching loss if too high.

Why is heatsinking important even if RMS current is below rating?

Switching losses can generate heat even at low RMS current. Adequate thermal path prevents junction overheating.

What is the benefit of using SiC/GaN MOSFETs in VFDs?

Higher switching speed, lower switching loss, better efficiency, can handle higher frequency than silicon MOSFETs.

How does space-vector PWM improve over sine-PWM?

Reduces harmonic content, maximizes DC bus utilization, produces smoother voltage waveform.

Why is proper PCB layout critical in high-power VFDs?

Reduces parasitic inductance, minimizes EMI, ensures safe gate/power loops, improves thermal performance.

How does dead-time optimization affect inverter efficiency?

Too long → reduced voltage delivered, too short → shoot-through. Optimized dead-time balances efficiency and safety.

What is the impact of parasitic capacitance in MOSFET switching?

Slower turn-on/off, possible ringing, extra energy dissipation.

How is switching loss affected by dV/dt and dI/dt?

Faster transitions → higher di/dt and dv/dt → more ringing and switching loss in parasitic elements.

How does a DC bus capacitor smooth voltage?

Stores energy and supplies current during switching, reducing ripple seen by the inverter.

Why do engineers limit dV/dt in motor drives?

Protects motor insulation, reduces EMI, and prevents overvoltage stress.

What is shoot-through protection and how is it implemented?

Prevents both switches in a half-bridge from conducting simultaneously, implemented via dead-time and logic interlocks.

How do you select a gate driver for a MOSFET in a high-frequency inverter?

Must provide sufficient current to charge/discharge Qg quickly, withstand CMTI, and drive voltage appropriate for device.

Why is thermal impedance important in MOSFET/IGBT datasheets?

Determines junction temperature rise for given power dissipation. Affects safe operation and heatsink design.

What is a snubber and why is it used?

Circuit (RC, RCD, or diode-capacitor) across switch to limit voltage spikes, ringing, and dv/dt stress.

What is the advantage of using a 3-phase VFD vs single-phase?

Balanced torque, smoother motor operation, better efficiency, reduced vibration and harmonics.

What is the effect of increasing DC bus voltage on switching loss?

Higher bus voltage increases E_sw = 0.5 × Coss × Vds², increasing switching loss per transition.

How do you calculate MOSFET switching loss?

Switching loss: P_sw = f_sw × (E_on + E_off), where E_on and E_off are the energies dissipated during turn-on and turn-off transitions.

How do you estimate IGBT switching loss with tail current?

P_sw = f_sw × (E_on + E_off + E_tail), where E_tail accounts for extra energy from minority-carrier tail current.

What is conduction loss for a MOSFET?

P_cond = I_RMS^2 × Rds(on) for DC or steady AC current.

What is conduction loss for an IGBT?

P_cond = I_C × V_CE(sat) × duty_cycle, considering the IGBT’s saturation voltage.

How do you calculate RMS current in a DC bus capacitor?

I_RMS = sqrt(1/T ∫₀^T i_C^2 dt), where i_C is instantaneous capacitor current. For PWM, approximate using ripple formula: I_RMS ≈ I_L × sqrt(D(1-D)), where D is duty cycle.

How do you calculate energy stored in a capacitor?

E = 0.5 × C × V^2

How do you calculate DC bus ripple voltage?

ΔV = I_Ripple / (f_sw × C), approximation for high-frequency ripple, where I_Ripple is capacitor ripple current.

How do you calculate peak current through a half-bridge MOSFET?

I_peak = I_load + (ΔI / 2), where ΔI is inductor or motor ripple current.

How do you calculate switching loss due to Coss?

E_sw(Coss) = 0.5 × Coss × Vds^2 per switching event.

What is the formula for total inverter output voltage in SVPWM?

V_out = V_dc × M × sin(θ), where M is modulation index and θ is electrical angle.

What is the RMS voltage output of a sine PWM inverter?

V_RMS = V_dc / sqrt(2) × M, for linear modulation range (0 < M < 1)

How do you calculate modulation index in SVPWM?

M = V_phase / (V_dc / sqrt(3)), ratio of desired phase voltage to maximum achievable phase voltage.

How do you calculate the dead-time effect on output voltage?

ΔV = I_load × Rds(on) × (t_dead / T_switch), voltage lost due to non-conduction during dead-time.

How do you estimate thermal junction temperature?

T_j = T_ambient + P_total × R_thJA, where R_thJA is junction-to-ambient thermal resistance.

How do you calculate diode reverse recovery loss?

P_rr = f_sw × V_R × Q_rr, where Q_rr is reverse recovery charge and V_R is reverse voltage during recovery.

How do you calculate switching loss in a half-bridge with inductive load?

Integrate instantaneous v_DS × i_D over transition time, P_sw = f_sw × ∫ v_DS × i_D dt.

How do you calculate RMS current in a 3-phase load?

I_RMS = sqrt((I_a^2 + I_b^2 + I_c^2)/3)

How do you calculate the fundamental component of PWM voltage?

V_1 = 4 × V_dc / (π × sqrt(2)) × sin(π × D), where D is duty ratio per PWM period.

How do you estimate IGBT tail energy?

E_tail ≈ ∫ V_CE × I_tail dt during turn-off. Typically extracted from datasheet graphs.

How do you calculate switching loss reduction by slower dV/dt?

Slower transitions reduce peak I × V overlap, reducing E_on + E_off, but may increase total losses if excessively slow due to conduction overlap.

How do you calculate peak voltage stress due to ringing?

V_peak = V_DC + I_L × sqrt(L_parasitic / C_parasitic), rough LC resonance estimate.

How do you calculate average power delivered via PWM?

P_avg = V_dc × I_load × D, where D is duty cycle.

How do you calculate RMS voltage on motor phase with PWM?

V_RMS = V_dc × sqrt(D), where D is effective duty ratio for high-frequency PWM approximation.

How do you calculate switching loss in SiC MOSFETs?

P_sw = f_sw × (E_on + E_off), consider higher frequency capability and lower Coss compared to silicon MOSFETs.

How do you calculate thermal derating for high frequency?

Reduce allowed P_total or switch frequency according to junction temperature limits: f_max = f_rated × (T_j,max - T_ambient) / ΔT_allowed.

How do you calculate DC bus capacitor ripple current for 3-phase inverter?

I_RMS = I_load × sqrt(3/2 × (1 - D)^2), approximate formula for balanced three-phase PWM load.

How do you calculate energy dissipated in a gate resistor?

E_gate = 0.5 × C_g × V_gate^2 per transition.

How do you calculate RMS current through a half-bridge leg with PWM?

I_RMS ≈ sqrt(D × I_load^2 + (1-D) × 0^2) = I_load × sqrt(D)

How do you calculate safe operating area (SOA) for a switch?

Check datasheet curves: P = I × V ≤ SOA curve for pulse duration and junction temperature.

How do you calculate losses in DC bus inductor?

P_L = I_RMS^2 × R_L + core loss (depends on frequency and flux swing).

How do you calculate switching frequency needed to meet current ripple specification?

f_sw ≈ V_dc / (L × ΔI), where L is motor or filter inductance and ΔI is allowable ripple.

How do you calculate harmonic content of PWM output?

Use Fourier analysis: V_n = (2 × V_dc / nπ) × sin(nπD) for nth harmonic.

How do you calculate RMS current in output LC filter?

I_RMS = sqrt(I_L^2 + (I_C_ripple)^2), sum of inductor and capacitor ripple contributions.

How do you calculate effective voltage applied to motor phase using PWM?

V_eff = sqrt(1/T ∫₀^T v^2(t) dt), RMS voltage over PWM period.

How do you calculate dead-time voltage loss for motor?

V_loss ≈ I_load × Rds(on) × t_dead × f_sw, average voltage lost during dead-time.

How do you calculate VFD efficiency?

η = P_out / P_in = (P_motor + losses) / P_dc, consider switching, conduction, and passive component losses.