Chapter 7_The Control Unit and Its Design

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53 Terms

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Micro-Operations

  • Smaller cycles that involves a series of steps, each of which involves the processor registers

  • The execution of each subcycle involves one or more shorter operations, that is _____

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micro

the prefix "_____" refers to the fact that each step is very simple and accomplishes very little.

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instruction cycle

  • The execution of a program consists of the sequential execution of instructions.

  • Each instruction is executed during an _____ made up of shorter subcycles

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Fetch,

Indirect,

Execute,

Interrupt

Sub cycles of the instruction cycle (4)

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Fetch Cycle, Indirect Cycle, Execute Cycle, Interrupt Cycle

Instruction Cycle (4)

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Memory Address Register (MAR),

Memory Buffer Register (MBR),

Program Counter (PC),

Instruction Register (IR)

Fetch Cycle (Four Registers)

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Memory Address Register (MAR)

  • Is connected to the address lines of the system bus.

  • It specifies the address in memory for a read or write operation.

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Memory Buffer Register (MBR)

  • Is connected to the data lines of the system bus.

  • It contains the value to be stored in memory or the last value read from memory

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Program Counter (PC)

Holds the address of the next instruction to be fetched

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Instruction Register (IR)

Holds the last instruction fetched.

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Fetch Cycle Sequence

  • The groupings of micro-operations must follow two simple rules:

    • The proper sequence of events must be followed.

    • Conflicts must be avoided. One should not attempt to read to and write from the same register in one time unit, because the results would be unpredictable.

  • A final point worth noting is that one of the micro- operations involves an addition.

  • To avoid duplication of circuitry, this addition could be performed by the ALU.

    • The use of the ALU may involve additional microoperations, depending on the functionality of the ALU and the organization of the processor.

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Indirect Cycle

  • The address field of the instruction is transferred to the MAR

  • this is then used to fetch the address of the operand

  • finally, the address field of the IR is updated from the MBR, so that it now contains a direct rather than an indirect address.

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Execute Cycle

  • Because of the variety of opcodes, there are a number of different sequences of micro-operations that can occur.

  • Instruction Decoding

  • The new feature introduced here is the conditional action.

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Instruction Decoding

The control unit examines the opcode and generates a sequence of micro-operations based on the value of the opcode.

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conditional action

  • The PC is incremented if (MBR) = 0. This test and action can be implemented as one microoperation.

    • Note also that this micro-operation can be performed during the same time unit during which the updated value in MBR is stored back to memory.

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Interrupt Cycle

  • At the completion of the execute cycle, a test is made to determine whether any enabled interrupts have occurred.

  • if so, the _____ occurs.

  • The nature of this cycle varies greatly from one machine to another.

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Instruction Cycle Code (ICC)

A new 2-bit register that designates the state of the processor in terms of which portion of the cycle it is in.

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00,

01,

10,

11

Instruction Cycle Codes (4)

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00

Instruction Cycle Code

  • Fetch

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01

Instruction Cycle Code

  • Indirect

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10

Instruction Cycle Code

  • Execute

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11

Instruction Cycle Code

  • Interrupt

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basic elements,

micro-operations,

functions

steps in the process to a characterization of the Control Unit

  • Define the _____ of the processor,

  • Describe the _____ that the processor performs,

  • Determine the _____ that the control unit must perform

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ALU,

Registers,

Internal data paths,

External data paths,

Control unit

basic elements of the processor (5)

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one register to another,

register to an external interface,

external interface to a register,

arithmetic or logic operation

micro-operations that the processor performs (4)

  • Transfer data from _____

  • Transfer data from a _____

  • Transfer data from an _____

  • Perform an _____ using registers for input and output

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Sequencing

Execution

functions that the control unit must perform to cause the micro-operations to be performed (2)

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Clock,

Instruction register,

Flags,

Control signals from control bus

Control Signals Inputs (4)

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Clock

Control signal Input.

  • This is how the control unit "keeps time";

  • the control unit causes one micro-operation (or a set of simultaneous micro-operations) to be performed for each clock pulse.

  • This is sometimes referred to as the processor cycle time, or the clock cycle time.

Control Unit Input

  • Issues a repetitive sequence of pulses that determine the timing of micro-operations.

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Instruction register

Control signal Input

  • The opcode and addressing mode of the current instruction are used to determine which micro-operations to perform during the execute cycle.

Control Unit Input

  • provides the opcode of the instruction, which the control unit uses to determine what actions to perform.

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Flags

Control signal input.

  • These are needed by the control unit to determine the status of the processor and the outcome of previous ALU operations.

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Control signals from control bus

Control signal input.

  • The control bus portion of the system bus provides signals to the control unit.

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Control signals within the processor,

Control signals to control bus

Control Signals Outputs (4)

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Control signals within the processor

Control signal output.

  • These are two types:

    • those that cause data to be moved from one register to another, and

    • those that activate specific ALU functions.

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Control signals to control bus

Control signal output.

These are two types:

  • control signals to memory,

  • and control signals to the I/O modules.

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ALU function,

data path,

signals on the external system bus

types of control signals used (3)

  • Those that activate an _____,

  • Those that activate a _____,

  • Those that are _____ or other external interface

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MAR onto the address bus,

memory read,

data bus to be stored in the MBR,

add 1 to the contents of the PC

The control unit sends the following control signals simultaneously

  • A control signal that opens gates, allowing the contents of the _____;

  • A _____ control signal on the control bus;

  • A control signal that opens the gates, allowing the contents of the _____;

  • Control signals to logic that _____ and store the result back to the PC.

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Hardwired implementation,

Microprogrammed implementation

categories of Control Unit Implementation (2)

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Hardwired implementation

The control unit is essentially a state machine circuit; its input logic signals are transformed into a set of output logic signals, which are the control signals.

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Inputs to the Control Unit,

Flags and Control Bus Signals,

Decoder,

Clock,

Counter

Control Unit Inputs (5)

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Inputs to the Control Unit

come from the

  • Instruction Register (IR),

  • the clock,

  • the flags,

  • and the control bus signals

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Flags and Control Bus Signals

contain individual bits that each have specific meanings (e.g., overflow).

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Decoder

  • To simplify control logic, the opcode is sent to a _____

  • Converts the encoded opcode into a unique output, with each opcode activating one specific output line.

  • In general, a ______ with n binary inputs produces 2ⁿ binary outputs, each representing one possible input pattern.

  • The _____ used in a control unit may need to handle variable-length opcodes, making it more complex.

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clock pulses

The period of the _____ must be long enough for signals to propagate through data paths and processor circuitry.

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Counter

  • Used as input to the control unit to distinguish between different time units (T1, T2, etc.).

  • At the end of the instruction cycle, the control unit sends a signal to the _____ to reinitialize it back to T1, starting the next cycle.

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Control Unit

produces output control signals based on its input signal

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P,

Q

Two control signals, _____ and _____, are defined to indicate the current cycle of operation:

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PQ = 00,

PQ = 01,

PQ = 10,

PQ = 11

control signals that indicate the current cycle of operation (4).

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PQ = 00

Control signal for cycle.

  • Fetch Cycle.

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PQ = 01

Control signal for cycle.

  • Indirect Cycle.

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PQ = 10

Control signal for cycle.

  • Execute Cycle.

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PQ = 11

Control signal for cycle.

  • Interrupt Cycle.

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Boolean equations

  • Collectively, they describe the behavior of the control unit and therefore the processor itself.

  • In modern processors, the number of required _____ is very large, making combinational circuit implementation complex.

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Microprogramming

A more practical method used in modern processors instead of pure hardware logic to simplify design when the number of required Boolean equations is very large.