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CPU
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Fetch Stage
The CPU gets the next instruction from the main memory.
Decode Stage
The Control Unit figures out what the instruction wants to do.
Execute Stage
The CPU performs the actual operation (like adding numbers).
Write Back
The result of the operation is saved back into memory or a register.
Program Counter (PC)
A register that holds the address of the very next instruction.
Instruction Register (IR)
A temporary storage for the instruction currently being decoded.
ALU
The "calculator" of the CPU that handles math and logic.
Control Unit (CU)
The "manager" that tells all other CPU parts what to do.
Pipelining
Processing multiple instructions at the same time in different stages.
Structural Hazard
A conflict where two instructions try to use the same hardware at once.
Data Hazard
When an instruction must wait for data from a previous unfinished step.
Control Hazard
A delay caused by "if/then" or "jump" instructions that change the flow.
RISC
A CPU design that uses a small set of simple, fast instructions.
CISC
A CPU design that uses complex instructions to do more in one step.
Registers
Extremely fast, small storage areas located inside the CPU itself.
Accumulator
A specific register used to store the results of ALU calculations.
MAR
Holds the specific memory address that the CPU needs to access.
MBR
Holds the actual data being moved to or from the memory.
Instruction Cycle
The complete process of fetching, decoding, and executing an instruction.
Clock Speed
How many instruction cycles a CPU can perform in one second.