Computer Architecture and Assembly Language Review

Flashcards for reviewing lecture notes on computer architecture and assembly language.

Binary to Hexadecimal Conversion

Splitting the binary number into groups of four and converting each group into its hexadecimal equivalent.

Hexadecimal (Base 16)

A base-16 number system that uses digits 0-9 and letters A-F to represent values.

Minimum Bits Required

To find the minimum number of bits, convert the number to binary and count the bits.

Bitwise Mask AND

Using a mask to selectively zero out bits in a number.

Bitwise Mask OR

Using a mask to selectively force bits to one in a number.

ASCII Table Decoding

A table used to decode binary messages into characters, paying attention to capitalization.

Calculating Number of Bytes

Divide the number of bits by 8 and round up to the nearest whole number.

Calculating Number of Bits

Multiply the number of bytes by 8.

Two's Complement Decimal Value

Flip the bits and add one to compute the magnitude, remember to apply the negative sign.

Right Logical Shift

Shifting bits to the right and padding with zeros.

MIPS-32, x86-64, and ARM64 ISAs

Assembly languages that are instruction set architectures.

MOVZ (Move with Zero)

Assembly Language instruction to set a register and zero out the rest.

MOVK (Move with Keep)

Assembly language instruction that updates specific bits while leaving the rest untouched.

Left Logical Shift

Shifting bits to the left and padding with zeros.

TST Instruction

Assembly instruction used to check if a bit is set.

ORR Instruction

Assembly instruction used to set a bit.

AND with Inverted Bitmask Instruction

Assembly instruction used to clear a bit.

EOR Instruction

Assembly instruction used to flip a bit.

RISC Architecture

An architecture with a smaller, more optimized set of instructions, emphasizing simplicity and efficiency and lower power consumption.

CISC Architecture

An architecture with complex instructions, variable instruction length, and direct memory access.

Compiling and Assembly

Converting high-level code to assembly code and then to machine code for execution.

Implementing Loops in ARM64 Assembly

Using MOV, SUBS, and B.PL or MOV, ADD, CMP, and B.LT.

Memory Hierarchy

Memory organization based on access time, size, and cost.

Stored Program Concept

Instructions and data are stored in memory as bytes.

Memory Segments

Text (code), static data, stack, and heap.

IEEE-754 Number

Extract components from a given IEEE-754 number in hexadecimal format and calculate the decimal value of the number.

CPU Cache

The small, high-speed memory located near the CPU that stores copies of frequently accessed data.

CPU Cache Predictive Models

LRU, FIFO, Random, LFU, next line predictions, stride based.

Object Code

Requires linking and is not executable.

Arithmetic Addition of Two Binary Numbers

Shows your work (including carries).

Labels and Addresses

Refer to positions in code or data.

Memory Segments Mutability

Data word 42. Alabel pointing to memory word w value42 I L.org Heap StaticData Codetext

Range of Unsigned Integers

0 to 2^N - 1

Range of Signed Integers

-2^(n-1) to 2^(n-1) - 1

Number of Distinct Values

2^N

Bitwise NOT

Flips every bit

AND Gate

Line (think of N and D have straight lines)

OR Gate

Curve (o is curved)

XOR Gate

Two curves (think double of OR)

NOT Gate

Open circle at tip, same design as their counter

Datapath Components

Set of hardware components responsible for executing instructions specifically, moving and transforming data.

Register File

stores values temporarily

ALU

performs arithmetic and logic operations (add, AND)

PC (Program counter)

holds address of current instruction

Data memory

holds data being read/ written by the program

ARM64 general-purpose Registers

31 general-purpose registers named X0 through X30, plus a zero/register alias XZR/SP

Xn

Full 64-bit register

Wn

Lower 32 bits of Xn (called half-registers)

Using the stack in ARM64 Assembly

Saving register values, passing extra arguments, local variables, Return addresses

STP

Store Pair (push 2 registers)

LDP

Load Pair (pop 2 registers)

STR / LDR

Store/load a single register

SUB SP, SP, #N

Make space on stack

ADD SP, SP, #N

Deallocate space from stack