Fetch-decode-execute cycle

What is the purpose of the Fetch stage in the Fetch-Decode-Execute cycle?

The purpose is to retrieve the next instruction from memory.

What is the process in the Fetch stage?

• The Program Counter (PC) holds the address of the next instruction.

• The Control Unit (CU) signals the Memory Address Register (MAR) to load the address from the PC.

• The instruction is fetched from memory and transferred via the data bus to the Memory Data Register (MDR).

• The Current Instruction Register (CIR) is updated with the fetched instruction.

• The PC is incremented to point to the next instruction.

How are registers affected during the Fetch stage?

• PC: The Program Counter is updated to the next instruction's address.

• MAR: The Memory Address Register temporarily holds the address from the PC.

• MDR: The Memory Data Register holds the instruction fetched from memory.

• CIR: The Current Instruction Register holds the fetched instruction to be decoded.

What is the purpose of the Decode stage in the Fetch-Decode-Execute cycle?

The purpose is to interpret the instruction and determine what actions need to be taken.

What happens during the Decode stage?

• The Control Unit (CU) examines the instruction in the CIR.

• The instruction is decoded to identify the operation (e.g., arithmetic, memory access).

• The CU prepares control signals to execute the instruction.

• If operands are needed, the MAR is loaded with addresses of the operands.

How are registers affected during the Decode stage?

• CIR: The Current Instruction Register holds the decoded instruction.

• CU: The Control Unit generates control signals based on the decoded instruction.

• MAR, ACC, or other registers: Depending on the instruction, these registers may be prepared to hold operands.

What is the purpose of the Execute stage in the Fetch-Decode-Execute cycle?

The purpose is to carry out the operation specified by the instruction.

What is the process in the Execute stage?

• The CU activates appropriate hardware (e.g., ALU, memory).

• If the instruction is an arithmetic or logical operation, the ALU performs the operation using operands in registers (ACC or MDR).

• The result of the ALU operation is stored in the Accumulator (ACC).

• If a memory operation occurs, the MAR and MDR interact with memory.

• For jump or branch instructions, the PC is updated with the new address.

How are registers affected during the Execute stage?

• ACC: Stores the result of ALU operations.

• MAR: Holds the address for memory operations.

• MDR: Stores data being read from or written to memory.

• PC: If a jump or branch instruction is executed, the Program Counter is updated to the target address.