Fetch decode execute cycle

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Buses

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from the vle online textbook

9 Terms

1

Buses

Communication channels through which data can be sent around the computer

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2

Data bus

Carries data between the processor and memory

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3

Address bus

Carries the address of the memory location being read from or written to.

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4

Control bus

Sends control signals from the control unit.

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5

Describe the purpose of the control unit

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6

Fetch

  • Contents of the PC are copied to MAR

  • The read signal is sent across the control bus and the contents of the MAR are sent across the address bus.

  • The contents of the memory location stored in the MAR are then sent across the data bus and stored in the MDR

  • The contents of the MDR are then copied to the CIR

  • The PC is incremented by one.

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7

Decode

  • the contents of the CIR are sent to the control unit

  • the control unit decodes the instruction

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8

execute

  • the registers can be changed in different ways during the execution phase, depending on the instruction.

  • if the instruction is for a memory location to be read from or written to (LDA or STA), then the address stored within the instruction will be loaded into the MAR.

  • with STA the data stored in the ACC is sent to memory

  • LDA the data is loaded from memory into the ACC

  • If the instruction is to carry out a calculation, the contents of the MDR and ACC are sent to the ALU and the result sent back to the ACC.

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9
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