Fetch decode execute cycle
1 The characteristics of contemporary processors, input, output and storage devices Processors may also have general purpose registers. These can temporarily store data being used rather than sending data to and from memory. (Memory data access times are slow compared to special purpose registers but still much faster than secondary storage.) Buses Buses are the communication channels through which data can be sent around the computer. You need to know about three buses: 1 The data bus carries data between the processor and memory. 2 The address bus carries the address of the memory location being read from or written to. 3 The control bus sends control signals from the control unit. Now test yourself 1 Describe the purpose of the control unit. 2 State the names of the three buses used by the CPU. 3 State the name of the part of the CPU responsible for calculations. Answers on p. 209 The fetch–decode–execute cycle, including its effects on registers Making links In order to fully understand this section you need to know about the Little Man Computer instruction set. You should revisit this section after studying Chapter 2, Assembly language. The processor works by continually fetching, decoding then executing instructions. You need to be aware of how the registers are used during the process. Fetch 1 The contents of the PC are copied to the MAR. 2 The read signal is sent across the control bus and the contents of the MAR are sent across the address bus. 3 The contents of the memory location stored in the MAR are then sent across the data bus and stored in the MDR. 4 The contents of the MDR are then copied to the CIR. 5 The PC is incremented by one. Decode 6 The contents of the CIR are sent to the control unit. 7 The control unit then decodes the instruction. Execute 8 The registers can be changed in different ways during the execution phase, depending on the instruction. For instance, if the instruction is for a memory location to be read from or written to (that is, LDA or STA), then the address stored within the instruction will be loaded into the MAR. In the case of STA, the data stored in the ACC is sent to memory. In the case of LDA, the data is loaded from memory into the ACC. If the instruction is to carry out a calculation (that is, ADD or SUB) then the contents of the MDR and ACC are sent to the ALU and the result sent back to the ACC. My Revision Notes OCR A-level Computer Science Third Edition Execute Decode Figure 1.1 Fetch–decode– execute cycle Exam tip A common mistake is to talk about the control bus carrying instructions around the processor. This is not the case. Instructions are sent to and from memory via the data bus. The control bus carries the signals orchestrating the fetch– decode–execute signal. Fetch 9
1 The characteristics of contemporary processors, input, output and storage devices Processors may also have general purpose registers. These can temporarily store data being used rather than sending data to and from memory. (Memory data access times are slow compared to special purpose registers but still much faster than secondary storage.) Buses Buses are the communication channels through which data can be sent around the computer. You need to know about three buses: 1 The data bus carries data between the processor and memory. 2 The address bus carries the address of the memory location being read from or written to. 3 The control bus sends control signals from the control unit. Now test yourself 1 Describe the purpose of the control unit. 2 State the names of the three buses used by the CPU. 3 State the name of the part of the CPU responsible for calculations. Answers on p. 209 The fetch–decode–execute cycle, including its effects on registers Making links In order to fully understand this section you need to know about the Little Man Computer instruction set. You should revisit this section after studying Chapter 2, Assembly language. The processor works by continually fetching, decoding then executing instructions. You need to be aware of how the registers are used during the process. Fetch 1 The contents of the PC are copied to the MAR. 2 The read signal is sent across the control bus and the contents of the MAR are sent across the address bus. 3 The contents of the memory location stored in the MAR are then sent across the data bus and stored in the MDR. 4 The contents of the MDR are then copied to the CIR. 5 The PC is incremented by one. Decode 6 The contents of the CIR are sent to the control unit. 7 The control unit then decodes the instruction. Execute 8 The registers can be changed in different ways during the execution phase, depending on the instruction. For instance, if the instruction is for a memory location to be read from or written to (that is, LDA or STA), then the address stored within the instruction will be loaded into the MAR. In the case of STA, the data stored in the ACC is sent to memory. In the case of LDA, the data is loaded from memory into the ACC. If the instruction is to carry out a calculation (that is, ADD or SUB) then the contents of the MDR and ACC are sent to the ALU and the result sent back to the ACC. My Revision Notes OCR A-level Computer Science Third Edition Execute Decode Figure 1.1 Fetch–decode– execute cycle Exam tip A common mistake is to talk about the control bus carrying instructions around the processor. This is not the case. Instructions are sent to and from memory via the data bus. The control bus carries the signals orchestrating the fetch– decode–execute signal. Fetch 9