Pages 245-272

ALU

ALU

the subsystem that performs such mathematical and logical operations as addition, subtraction, and comparison for equality

processor

A system that is composed of the ALU together with the control unit

data path

The ALU circuits, registers, and interconnections between components

register

A special, high-speed storage cell

stored program

a sequence of machine language instructions stored as binary values in memory

control unit

The computer subsystem that fetches and executes instructions stored in the memory of the computer

machine language

The programming languages that a processor is able to directly understand and execute; written in binary

instruction set

set of all operations that can be executed by a processor

RISC machine

Reduced Instruction Set Computer; a machine that has a very small and simple instruction set, but where each instruction is highly optimized and executes very quickly

CISC machine

Complex Instruction Set Computer; a machine that has a very large and complex instruction set

Program counter

A register that holds the address of the next instruction to be fetched in the fetch execute cycle.

instruction register

a special memory location in the CPU that stores the current instruction that is being executed

Von Neumann bottleneck

The inability of sequential, one-at-a-time processors to handle extremely large problems in a reasonable time scale

Non-Von Neumann architecture

computer designs based on models other than the standard Von Neumann architecture

MIMD parallel processing

multiple instruction stream/multiple data stream; a parallel processing model in which multiple processors all work independently on their own program to solve a single problem; also called cluster computing

cluster computing

independent systems, such as mainframes, desktops, or laptops, are interconnected by a local area network (LAN) like the Ethernet or a wide area network (WAN) such as the Internet; also called MIMD parallel processing

grid computing

A MIMD model in which the individual processors can be computer systems belonging to a wide range of groups or individuals

parallel algorithms

Algorithms that exploit the presence of multiple processors to solve a single problem

16-128

how many registers would a typical ALU have

register designator

how are registers accessed

multiplexer

what circuit can be used to select the proper ALU result

fetch, decode, execute

what are the 3 tasks of the control unit

data transfer, arithmetic, compare, branch

the 4 basic machine language instruction classes

halt or fatal error

the fetch, decode, execute cycle continues for each instruction in a program until what

scalable

MIMD parallel processing is what#

yes

should every ALU circuit be executed before choosing the appropriate one

no

are memory cells more accessible than registers

communications

what can become a serious bottleneck for a parallel system