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What is a Karnaugh map used for?
To simplify Boolean expressions by visually grouping adjacent 1s in a truth table.
What is the goal of K-map simplification?
To find the simplest Boolean expression (fewer logic gates → faster, cheaper circuit).
What size can K-map groups be?
Powers of 2 (1, 2, 4, 8, 16, …).
Can groups overlap in a K-map?
Yes, overlapping is allowed if it helps make larger groups.
Can groups wrap around edges of the K-map?
Yes — K-maps wrap around left–right and top–bottom
What does each group represent?
One simplified product term (AND term) where variables that change are eliminated.
What is a “don’t care” condition?
Input combinations that never happen or whose output doesn’t matter; you can include them in groups to simplify further.
What is “Sum of Products” (SOP)?
A Boolean expression written as an OR of AND terms (e.g., F=A′B+ACF = A'B + ACF=A′B+AC).
What is “Product of Sums” (POS)?
A Boolean expression written as an AND of OR terms (e.g., F=(A+B)(A′+C)F = (A+B)(A'+C)F=(A+B)(A′+C)).
What’s a combinational circuit?
A circuit whose outputs depend only on the current inputs (no memory).
Half-adder function?
Sum = A ⊕ B; Carry = A·B
Full-adder function?
Sum = A ⊕ B ⊕ Cin; Carry = AB + ACin + BCin
What does a subtractor do?
Performs binary subtraction; often implemented as A + (~B + 1).
What’s an adder-subtractor circuit?
Adds or subtracts depending on a control bit that inverts B and sets carry-in = 1 for subtraction.
What is a multiplexer (MUX)?
A circuit that selects one of many inputs to pass to the output based on select lines.
How many input lines does a MUX have with n select lines?
2^n input lines.
What is a decoder?
A circuit that converts n inputs into 2n2^n2n unique outputs, with only one output high at a time.
What’s the difference between half-comparator and full-comparator?
Half compares 1-bit inputs; full compares multi-bit values (greater, equal, less).
What makes a sequential circuit different?
It has memory; outputs depend on current inputs and previous state.
What provides memory in sequential circuits?
Feedback loops using latches or flip-flops.
What is a clock in digital circuits?
A timing signal that synchronizes state changes.
Rising edge vs falling edge?
Rising = low→high transition; Falling = high→low transition.
What is a latch?
A level-triggered storage device (transparent when enable is active)
What is a flip-flop?
An edge-triggered storage device that changes only on a clock edge.
Difference between latch and flip-flop?
Latch = level sensitive; Flip-flop = edge sensitive.
SR flip-flop truth table?
S=1,R=0 → Set (Q=1)
S=0,R=1 → Reset (Q=0)
S=0,R=0 → Hold
S=1,R=1 → Invalid
JK flip-flop modification?
Handles SR’s invalid state by toggling when J=K=1
JK flip-flop truth table?
J=0,K=0 → Hold
J=0,K=1 → Reset
J=1,K=0 → Set
J=1,K=1 → Toggle
D flip-flop behavior?
Q(next) = D (just stores input value on clock edge)
What does an excitation table show?
What inputs are needed to cause a desired change from current Q to next Q.
What is a Mod-N counter?
A counter that counts from 0 to N−1 then resets to 0.
How many flip-flops for a Mod-N counter?
Enough so 2^n ≥ N; n flip-flops needed.
What are the design steps for a JK counter?
Write state table (current → next).
Use excitation table to find required J and K for each flip-flop.
Simplify each J and K with K-maps.
Draw circuit.
Example: 3-bit Mod-7 counter — how many states?
7 states (000→110), reset after 111.
What is a register?
A group of flip-flops used to store multi-bit data.
What is an 8-bit register?
8 flip-flops that can store an 8-bit word
What control signals might a register have?
Load (store data), Clear/Reset (set to 0), Enable.
How is a register built with D flip-flops?
Each flip-flop’s D input connects to one data bit; all share the same clock and load control.
What is a bus?
A set of shared wires for transferring data, addresses, or control signals between components.
Advantages of buses?
Reduces wiring, easy to add devices.
Disadvantages of buses?
Only one device can use the bus at a time; limited bandwidth.
What determines bus transfer rate?
Data width × clock rate.
32-bit data bus at 2 GHz → transfer rate?
64 Gbit/s = 8 GB/s ≈ 7.45 GiB/s
What are the three main system buses?
Data Bus, Address Bus, Control Bus.
Data Bus function?
Carries actual data between CPU, memory, and peripherals
Address Bus function?
Carries memory or I/O addresses for reads/writes.
Control Bus function?
Carries timing and control signals (read/write, interrupt, etc)
What is a tri-state buffer?
Output can be 0, 1, or high-impedance (Z) so multiple devices can safely share the same bus.
16-bit address bus can access how much memory?
2^16 = 65,536 bytes = 64 KiB