Computer Organization and Architecture - CPU

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Flashcards for reviewing key concepts related to CPU organization and architecture.

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31 Terms

1
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What are the common components of every CPU?

ALU, control unit, and registers

2
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What does the ALU do?

Performs computation or processing of data

3
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What is the function of the control unit?

Controls the movement of data and instructions into/out of the processor and controls the operation of the ALU

4
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What is the function of registers?

Provide minimal internal memory for temporary data and instruction storage

5
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What are the two principal parts of the CPU?

Data path and control unit

6
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What components are interconnected in the data path?

ALU and storage units (registers) interconnected by a data bus

7
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What signal does the control unit provide?

Signals to data path, memory, and I/O devices based on program instructions

8
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How are devices on the internal CPU bus identified?

By a unique number set on the control lines

9
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What do data lines on an external bus do?

Convey bits from one device to another.

10
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How do control lines on an external bus function?

Determine the direction of data flow and when each device can access the bus

11
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What is the function of address lines on an external bus?

Determine the location of the source or destination of the data

12
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What is the purpose of user-visible Registers?

May be referenced by assembly-level instructions and are thus visible to the user.

13
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What is the purpose of Control & Status Registers?

Used to control the operation of the CPU. Most are not visible to the user.

14
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What are the categories of user-visible registers?

General purpose, data, address, condition codes/flags

15
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What is the role of data registers?

Hold data and cannot be used in the calculation of an operand address

16
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What is the function of address registers?

Hold address information

17
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What information does the Program Counter (PC) hold?

The address of an instruction to be fetched

18
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What information does the Instruction Register (IR) hold?

The instruction most recently fetched

19
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What is the purpose of the Memory Address Register (MAR)?

The address of a location in memory

20
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What is the purpose of the Memory Buffer Register (MBR)?

A word of data to be written to memory or the word most recently read

21
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What is the function of the Extended Instruction Pointer (EIP) register?

Holds the address of the next instruction to be executed

22
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What does the Program Status Word (PSW) contain?

Status information and condition codes

23
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List the common status flags found in the Program Status Word (PSW).

Zero flag (ZF), Sign flag (SF), Carry flag (CF), Overflow flag (OF), Auxiliary flag (AF), Parity flag (PF)

24
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What are the three stages of instruction processing?

Fetch cycle, Execute cycle, Interrupt cycle

25
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When does program execution halt?

If the machine is turned off, some sort of unrecoverable error occurs, or a program instruction that halts the computer is encountered.

26
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What is instruction pipelining?

CPU breaks the fetch-decode-execute cycle into tasks that are performed in parallel so that more than one task can be executed at a time.

27
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What is a pipeline hazard?

A pipeline stall because conditions do not permit continued execution.

28
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What are the different types of pipeline hazards?

Resource hazard, data hazard, control hazard

29
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What is a resource hazard?

Occurs when two (or more) instructions that are already in the pipeline need the same resource.

30
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What is a data hazard?

Occurs when there is a conflict in the access of an operand location.

31
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What is a control hazard?

Occurs when the pipeline makes the wrong decision on a branch prediction (change the PC value).