Introduction to Assembly Language – Intel 8086

Vocabulary flashcards covering key Intel 8086 assembly language concepts, registers, addressing modes, directives, and flags.

Assembly Language (AL)

A low-level programming language whose statements map one-to-one to the CPU’s machine instructions.

Assembler

A translation program that converts assembly language source code into executable machine code.

Machine Instruction

Binary code understood directly by the CPU, telling it to perform a specific operation.

Instruction Set

The complete collection of machine instructions available for a particular CPU model.

Opcode

The portion of a machine or assembly instruction that specifies the operation to perform.

Mnemonic

A short alphabetic code (e.g., MOV, ADD) that represents an opcode in human-readable form.

Operand

The data item(s) on which an instruction acts; may be a register, memory location, or immediate value.

Immediate Operand

A constant value embedded directly within the instruction itself.

Register Operand

An operand located in a CPU register.

Memory Operand

An operand located at a specific address in main memory.

Addressing Mode

A method used by an instruction to specify the location of its operands.

Immediate Addressing Mode

The operand is a literal constant within the instruction (e.g., MOV AL,25h).

Register Addressing Mode

Transfers data between CPU registers of the same size (e.g., MOV AX,DX).

Memory Addressing Mode

Accesses an operand stored in main memory using either a direct or indirect address.

Direct Addressing Mode

The effective memory address is given explicitly in the instruction (e.g., MOV AL,[2000h]).

Indirect Addressing Mode

The memory address is held in a base or index register, optionally combined (e.g., MOV AL,[BX]).

Register (CPU)

A high-speed 16- or 8-bit storage location inside the CPU used by nearly every instruction.

General-Purpose Register

One of AX, BX, CX, DX; can be used for arithmetic, data movement, and addressing.

Accumulator Register (AX)

Favored for arithmetic, I/O, and part of the word-size MUL/DIV pair with DX.

Base Register (BX)

Supports arithmetic, data moves, and can hold a memory base address.

Counter Register (CX)

Automatically decremented by LOOP and shift/rotate instructions; acts as a loop counter.

Data Register (DX)

Works with AX for word-sized multiplication and division; also used in I/O operations.

Stack Pointer (SP)

Special register that holds the offset of the current top of the stack.

Base Pointer (BP)

Holds a reference point within the stack for accessing parameters or local variables.

Source Index (SI)

Contains the memory offset of source data for string and block operations.

Destination Index (DI)

Contains the memory offset of destination data for string and block operations.

Segment Register

One of CS, DS, ES, SS; holds the selector (base) of a 64 KB segment in memory.

Code Segment Register (CS)

Points to the segment containing the currently executing instructions.

Data Segment Register (DS)

Points to the segment where most program data variables reside.

Extra Segment Register (ES)

Provides an additional data segment, often used with string operations.

Stack Segment Register (SS)

Points to the segment that contains the runtime stack.

Status Register (FLAGS)

A collection of 1-bit flags that record processor state and arithmetic results.

Instruction Pointer (IP / PC)

Holds the offset of the next instruction to be executed within the code segment.

Carry Flag (CF)

Set when an arithmetic operation generates a carry or borrow out of the most significant bit.

Parity Flag (PF)

Indicates whether the number of set bits in the least-significant byte of the result is even.

Sign Flag (SF)

Reflects the sign (most significant bit) of the result; 1 for negative, 0 for positive.

Zero Flag (ZF)

Set when the result of an operation is zero.

Overflow Flag (OF)

Indicates signed arithmetic overflow occurred.

Auxiliary Carry Flag (AF)

Set when a carry occurs between bit 3 and bit 4 (BCD arithmetic support).

DB Directive

Define Byte; reserves 1-byte variables and may optionally initialize them.

DW Directive

Define Word; reserves 2-byte (16-bit) variables and may optionally initialize them.

DD Directive

Define Doubleword; reserves 4-byte (32-bit) variables with optional initial values.

DQ Directive

Define Quadword; allocates 8-byte (64-bit) storage, typically for large integers or reals.

DT Directive

Define Tenbyte; allocates 10-byte storage, often for extended-precision floating numbers.

DUP Operator

Allocates multiple copies of a value (e.g., DB 20 DUP(0) reserves twenty zero bytes).

Reversed Storage Format

When storing a word or doubleword, the assembler places the low byte at the lowest address (little-endian).