CSC 35 Final Exam

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101 Terms

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Where does the processor maintain the stack?
In memory
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What size integers does the stack store?
Size of the integer is dependent on bit size of the system

64 bit system will store a 64 bit integer
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fixed location pointer (SO)
defines the bottom of the stack
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stack pointer (SP)
gives the location of the top of stack
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growing upwards
bottom pointer (SO) is the lowest address in the stack buffer, and stack grows towards higher addresses
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growing downwards
bottom pointer (SO) is the highest address in the stack buffer and stack grows towards lower addresses
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if the data exceeds the allocated space, a _______________________ occurs
stack overflow
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stacks are implemented using __________ buffers which are __________ in size
stacks are implemented using MEMORY buffers which are FINITE in size
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How does is the stack essential for subroutines to work?
* used to save the return addresses for call instructions
* backup and restore registers
* pass data between subroutines
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what does the call instruction do?
transfers control to a subroutine
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what is the return instruction used for?
to mark the end of a subroutine
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if you forget to use the return instruction what will happen?
execution will simply continue, in memory, until a return instruction is encountered
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instruction to call
call address
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instruction to return
ret (there is no argument)
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what happens when the return instruction is executed?
the old instruction pointer is read form the system stack and the current instruction pointer is updated to restore execution after the initial call
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the operating system is...
a series of programs
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the programs that make up operating systems run with ________________ that are needed to talk to all the hardware and run instructions
special privileges
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processors support two modes for executing programs, these are...
* privileged (supervisor) mode
* user mode
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privileged/supervisor mode can...
* run special instructions
* -talk to all the hardware
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user mode can...
* only execute certain instructions
* can't talk to all the hardware
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vector tables store
addresses of interrupt service routines
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when a processor is interrupted/alerted that something must be handled...
it runs a special program that handles the event
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during an interrupt, the processor sends an ___________________
interrupt number
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the interrupt number
a pointer to a location in a vector tables that contains the address of the ISR to execute
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all interrupt service routines belong to which part of the operating system?
the kernal
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the three steps the processor takes to execute subroutines are..

1. backup the register file
2. execute interrupt service routine
3. restore the original executing program and register file once completed
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software programs "talk" to the operating system using an _________________
API : application program interface
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benefits of API's
* applications are faster and smaller
* makes the system more secure since apps do not directly talk to IO
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syscall instruction
calls interrupt number reserved for programs needing attention
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The rate in which instructions are executed is controlled by ____________
the CPU clock
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How is the clock rate measured?
Hertz - number of oscillations per second
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true/false - the faster the clock rate, the faster instructions will be executed
true
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true/false - some instructions require multiple cycles to execute
true
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true/false - the increase in performance increases at a linear rate
false - speed and density improve exponentially, not linearly
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Moore's Law
states the performance doubles every 18 months
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two major design philosophies
CISC vs RISC
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RISC stands for
Reduced Instruction Set Computer
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CISC or RISC?

instructions can take multiple clock cycles depending on how complex
CISC
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RISC philosophy emphasizes what design principles?
* simple hardware
* software should contain the complexity rather than hardware
* minimalize memory access
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CISC advantages
* generally requires fewer instructions than RISC to perform same computation
* software is easier to write
* programs tend to take less space in memory
* variable sized instructions make it possible to add more instructions
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CISC or RISC?

access to memory is restricted to load/store instructions
RISC
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CISC or RISC?

the number of bytes used by instructions tend to vary in sizes
CISC
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CISC or RISC?

instructions typically take one clock cycle each
RISC
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CISC or RISC?

bytes used by instructions tend to be fixed in size
RISC
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RISC advantages
* simpler instructions simplify hardware, making processors easier to manufacture
* produces less heat and requires less energy
* memory access is minimized
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CISC stands for
Complex Instruction Set Computer
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CISC or RISC?

operands are generalized - each can access memory, immediate or registers
CISC
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CISC or RISC?

many registers - since all instructions can only use registers for calculations
RISC
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CISC or RISC?

very few general-purpose registers
CISC
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CISC philosophy emphasizes what design principles?
* emphasizes flexibility in instructions
* hardware should contain complexity rather than the software
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as the rate of processor growth has been greater than memory, the relative speed of memory to the processor's speed has gotten much _________
slower
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why is memory the bottleneck of CISC functionality?
CISC can access memory with every instruction and it is far more efficient now to do all the work on the processor and use memory only when absolutely necessary
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true/false - memory is slow compared to register-to-register operations, making is less favorable as an architecture design
true
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single operand processors are also known as
accumulators
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two operand processor operands
both operands are typically treated as input, one is used to store the result
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single operand processors are what generally which style architecture?
CISC
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three operand processors are generally which style architecture?
RISC
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compact encoding
* takes as little space as possible to store instructions
* programs require less storage
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simple encoding
* requires little logic to decode
* minimizes the circuitry on the process and reduces cost
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the more bits available for instructions...
the more complex the opcode and unique instruction potential
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in order to optimize circuitry..
the format of opcodes and instructions aid circuitry
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a common trick is to use parts of the opcode to store fields.. the example in notes allows ____________ to be stored in upper nibble and _____________ contained in lower nibble
Load opcodes (one for each register), register number (used to access register file)
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signed integer
represents both positive and negative numbers
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unsigned integer
only represents positive
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what is the value of 00001101 represented in signed magnitude? (in decimal)
13
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What is the value of 10001101 represented in signed magnitude? (in decimal)
\-13
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true/false - signed magnitude has one zero
false
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true/false - 1's complement has two zeros (positive and negative)
true
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true/false - 2's complement has two zeros (positive and negative)
false
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how does 1's complement represent positive and negative values?
* there is no sign bit
* the value can be made negative by inverting each
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what is the decimal value of 00001101 in 1's complement?
13
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what is the decimal value of 11110010 in 1's complement?
-13
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how are numbers represented in 2's complement?
after the number is inverted (like 1's complement), 1 is added to result
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what is the decimal value of 111111111111111111 in 2's complement?
-1
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true/false - processors know the difference between unsigned or signed integers
false, it is the programmer's responsibility to keep track if it's signed or unsigned
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addition instruction
add target, value

target = register or memory

value = immediate, register, memory
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subtraction instruction
sub target, value

target = register or memory

value = immediate, register, memory
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negation instruction in 2's complement
neg register
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which two registers are used in intel to store a product using multiplication?
RAX - contains the lower 8 bytes

RDX - contains the upper 8 bytes
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which register must be used to store the input for multiplication in intel?
RAX - must store data
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signed multiply instruction
imul operand

operand = register or memory only
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unsigned multiply instruction
mul operand

operand = register or memory only
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sign magnitude extension
(msb stores the negative sign)

* copy the old sign bit to the new sign bit and fill the rest of the new bits with zeroes (including old sign bit)
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sign magnitude extension of 01001101 (77) is...
00000000 01001101
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sign magnitude extension of 11001101 (-77) is...
10000000 01001101
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2's complement extension
copy the old most significant bit to all the new bits
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2's complement extension of 01001101 (77) is...
0000000001001101
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2's complement extension of 10110011 (-77) is...
1111111110110011
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which two registers does division on the x86 processor use for the numerator?
RAX - contains the lower 8 bytes

RDX - contains the upper 8 bytes
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which two registers are used for the result?
RAX - contains the quotient (whole number)

RDX - contains the remainder
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signed divide instruction -
idiv denominator

denominator = register or memory / the divisor
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unsigned divide instruction
div denominator
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sign-extension for divide instruction
cqo

sign extends rax into rdx
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how does compare work?
the second argument is subtracted from the first

the result is used to determine how the operands compare and the result is discarded
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compare instruction
cmp arg1, arg2

arg1 = register or memory

arg2 = immediate, register, memory
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what are flags?
a boolean value that indicates the result of an action
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where are flags stored?
in the status register, as individual bits
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zero flag
true - if last computation resulted in zero / the two operands are equal
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sign flag
true - if the msb of the result is 1
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carry flag
true - if a 1 is "borrowed" when subtraction is performed

important for unsigned numbers as it indicates it exceeded the size of register or an underflow