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UNIT 1: COMPONENTS OF A COMPUTER AND THEIR USES Specification: 1.1.1 Structure and function of the processor 1.1.2 Types of processor 1.1.3 Input, output and storage
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WPO the Processor / CPU?
To carry out instructions from programs stored in memory
What components are in the CPU / processor?
Control Unit (CU)
Arithmetic Logic Unit (ALU)
Buses
Registers
WPO the Control Unit?
Coordinates activity of all other components
- Control signals are sent along the control bus between the CU and the other components
WPO the Arithmetic Logic Unit?
Performs arithmetic, logical, and shift operations on data
What is a bus and what is inside the system bus?
Buses consist of a series of connectors that transfer signals between internal components
The system bus consists of 3 different buses carrying control signals, addresses and data.
What do control signals include?
- Memory read - causes data from addressed location in RAM to be placed on data bus
- Memory write - causes data on data bus to be written to addressed location in RAM
- Bus request - indicates that a device is requesting use of the data bus
- Bus grant - indicates that the CPU has granted access to data bus
- Clock - used to synchronise operations
What are registers and name some dedicated registers used by the CPU?
Registers are super-fast memory that is used to temporarily store results.
- Accumulator
- Program Counter (PC)
- Current Instruction Register (CIR)
- Memory Address Register (MAR)
- Memory Data Register (MDR)
WPO the Accumulator?
Holds accumulated results of operations carried out by ALU
WPO the Program Counter?
Holds the memory address of the next instruction to be executed
WPO the Current Instruction Register?
Holds the current instruction, split into opcode and operand
WPO the Memory Address Register?
Holds address in memory where processor is required to fetch or store some data from it
WPO the Memory Data Register?
Temporarily holds data moving between processor and main memory / that is read from or written to memory
What is the Fetch part of the Fetch-Decode-Execute cycle?
FETCH (Step 1 - 4):
1) The address of the next instruction is copied from PC to MAR
2) The instruction held at that address is copied to the MDR
3) Simultaneously, the contents of the PC are incremented
4) The contents of the MDR are then copied to the CIR
What is the Decode part of the Fetch-Decode-Execute cycle?
DECODE (Step 5 - 7):
5) The instruction held in the CIR is decoded
6) The instruction is split into operand and opcode to determine the type of instruction, Additional detail (if needed) is fetched from memory…
7) and passed to the accumulator
(The opcode specifies the operation that is to be carried out.)
(The operand holds either:
the address of the data to be used, which is then copied to the MAR
OR the actual data to be operated on, which is passed to the MDR)
What is the Execute part of the Fetch-Decode-Execute cycle?
EXECUTE (Step 8):
8) The instruction is executed and the results held in accumulator or stored in memory
What is the formula to calculate memory capacity in bytes?
((2^no.of addresses) * (bit length)) / 8 (to convert to bytes)
Example Q: What would be the memory capacity in bytes of a machine with an 8-line address bus and a word length of 8 bits?
(number of addresses) 2^8 = 256 (bits)
(no of add x bit length) 256 x 8 = 2048 (bits)
(convert to bytes) 2048 / 8 = 256 bytes
What does the width of the address bus determine?
The max possible memory addresses of the system
What is the width of the data bus determined by?
The no. of wires or lines it contains.
What does the architecture of a computer include and what does it determine?
It includes the word size and width of the address bus
It determines the format of a machine code instruction for a particular type of processor
What factors affect processor performance?
- Clock Speed
- No. of Cores
- Amount + Type of Cache
How does clock speed affect processor performance?
The faster the clock speed, the faster a computer can fetch, decode and execute instructions
So, if a processor has a slow clock speed, it won’t be able to carry out the Fetch-Decode-Execute cycle as efficiently
How does the number of cores affect processor performance?
A quad-core computer has 4 processors linked together in the same integrated circuit
Each core is theoretically able to process a different instruction at the same time with its own Fetch-Decode-Execute cycle
However, the software may not always be able to take full advantage of all 4 processors
A computer will use parallel (or concurrent) processing = using several processor cores working at the same time
How does the amount + type of cache affect processor performance?
Cache is a small amount of super-fast (but expensive) memory that stores data and instructions that have recently been used by the processor
More cache memory a computer has = more likely that it will not have to fetch the next instruction or data from RAM
(As it will already have been loaded into the super-fast cache memory, which it can be retrieved from much more quickly)
What is the similarities / differences between Level 1 and 2 cache?
- Both are held on the processor chip
- Level 2 cache is larger but not as fast as Level 1 cache
(Level 1 cache is split into instruction cache and data cache, so data and instructions can be fetched simultaneously)
What is pipelining?
A technique used to improve performance (eg. by overlapping stages in the Fetch-Decode-execute cycle, or by breaking down the stages in an arithmetic instruction)