1/421
Looks like no tags are added yet.
Name | Mastery | Learn | Test | Matching | Spaced |
---|
No study sessions yet.
(Choose answer)
The register file employs much shorter addresses than addresses for cache and memory.
A.True
B.False
A.True
(Chooseanswer)
The___________command is used to activate a peripheral and tell it what to do.
A. read
B. test
C. write
D. control
D. control
When data are moved over longer distances, to or from a remote device, the process is known as______
A.data communications
B.structuring
C.data transport
D.registering
A.data communications
One distinguishing characteristic of memory that is designated as_____is that it is possible both to read data from the memory and to write new data into the memory easily and rapidly.
A RAM
B EPROM
C ROM
D.EEPROM
A RAM
A______is a small, very-high-speed memory maintained by the instruction fetch stage of the pipeline and containing the n most recently fetched instructions in sequence.
A. multiple
stream
B.delayed branch
C branchprediction
D.loop buffer
D.loop buffer
________attributes include hardware details transparent to the programmer.
A.Organizational
B.Memory
C.Architectural|
D.Interface
Organizational
What interface is used to connect the processor to I/O devices that require transmission of data one bit at a time?
A. Input
B.Serial
C.Parallel
D.Bus
E.Output
B.Serial
The data lines provide a path for moving data among system modules and are collectively called the _____
A. system bus
B. bus address
C.bus control
D. data bus
D. data bus
The operation_______yields true if either or both of its operands are true.
A. AND
B. NOT
C. OR
D. NAND
C. OR
_ instructions are used to position quantities in registers temporarily for computational operations
A. Window
B. Load-and-store
C.Complex
D.Branch
B. Load-and-store
_____is when the processor spends most of its time swapping pages rather than executing instructions
A.Swapping
B.Paging
C.Thrashing
D.Multitasking
C.Thrashing
The sum of the seek time and the rotational delay equals the________which is the time it takes to get into position to read or write
constant
A. angular velocity
B.transfer ntime
C. accesstime
D gap time
C. accesstime
Architectural attributes include______
A. interfaces
B. 1/O mechanisms
C. control signals
D. memory technology used
B. 1/O mechanisms
A number of chips can be grouped together to form a memory bank.
A.False
B True
B True
Assume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top one or two stack elements. Begin with an empty stack. What stack elements remain after the following instructions are executed? PUSH 3; PUSH 4; ADD; PUSH 5; MUL
A. 35
B.60
C. 34
D 39
E 345
A. 35
Register indirect addressing uses the same number of memory references as indirect addressing.
A.False
B True
A.False
The____________performs the computer's data processing functions
A.ALU
B. Register
C. system bus
D.CPU interconnection
A.ALU
The____contains a word of data to be written to memory or the word most recently read.
A.MBR
B. IR
C .PC
D.MAR
A.MBR
Cache memory enhances
A. Memory access time
B.Secondary storage capacity
C. Memory capacity
D. Secondary storage access time
A. Memory access time
Counters can be designated as___
A.asynchronous
B. synchronous
C. both asynchronous and synchronous
D. neither asynchronous or synchronous
C. both asynchronous and synchronous
One of the major problems in designing an instruction pipeline is assuring a steady flow of instructions to the initial stages of the pipeline
A False
B True
B True
An 1/O module that takes on most of the detailed processing burden, presenting a high-level interface to the processor, is usually referred to as an______
A.I/0 command
B. I/0 channel
C. device controller
D. I/0 controller
B. I/0 channel
The advantage of________is that no memory reference other than the instruction fetch is required to obtain the operand
A.direct addressing
C. stack addressing
D. register addressing
B. immediate baddressing
An error-correcting code enhances the reliability of the memory at the cost of added complexity.
A False
B True
B True
________is the simplest mapping technique and maps each block of main memory into only one possible cache line.
A.Direct nmapping
B.Associative mapping
C. Set associative mapping
D None of the above
A.Direct nmapping
The_consists of the access time plus any additional time required before a second access can commence
.A. latency
B. memory cycle time
C. transfer rate
D. direct access
B. memory cycle time
A________architecture is one that makes use of more, and more fine-grained pipeline stages.
A superpipelined
B. hybrid
C. superscalar
D. parallel
A superpipelined
The_________determines the opcode and the operand specifiers.
A fetch operands
B. calculate operands
C. decode instruction
D. execute instruction
C. decode instruction
An interrupt is generated from software and it is provoked by the execution of an instruction.
A. False
B. True
A. False
With direct addressing, the length of the address field is usually less than the word length, thus limiting the address range.
A. False
B. True
B. True
_______provide storage internal to the CPU.
A Control units
B. ALUS
c. Manory
D. Registers
D. Registers
The SSDs now on the market use a type of semiconductor memory referred to as flash memory.
A. False
B. True
B. True
The most important system program is the OS.
A. False
B. True
B. True
The___scheduler is also known as the dispatcher.
A. medium-term
B.I/0
C.short-term
D.long-term
C.short-term
In a volatile memory, information decays naturally or is lost when electrical power is switched off.
A. False
B. True
B. True
Microprogramming eases the task of designing and implementing the control unit and provides support for the family concept
A. False
B. True
B. True
The only form of addressing for branch instructions is_______addressing
A. register
B. relative
C. base
D. immediate
D. immediate
It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.
a. architectural
b. memory
c. mechanical
d. organizational
d. organizational
The disadvantage of the software poll is that it is time consuming.
A. True
B. False
A. True
Interrupt processing allows an application program to be suspended in order that a variety of interrupt conditions can be serviced and later resumed.
A. True
B. False
A. True
a_____is an actual location in main memory.
A. logical address
B. partition address
C. base address
D. physical address
D. physical address
The disadvantage of immediate addressing is that the size of the number is restricted to the size of the address field.
a. True
b. False
a. True
For internal memory, the __________ is equal to the number of electrical lines into and out of the memory module.
a. access time
b. unit of transfer
c. capacity
d. memory ratio
b. unit of transfer
The _________ scheduler determines which programs are admitted to the system for processing.
a. long-term
b. medium-term
c. short-term
d. I/O
a. long-term
Pipelining is a means of introducing parallelism into the essentially sequential nature of a machine-instruction program.
a. True
b. False
a. True
The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.
a. multicore
b. GPU
c. data channels
d. MPC
a. multicore
The allocation of control information between registers and memory are not considered to be a key design issue.
a. True
b. False
b. False
When large volumes of data are to be moved, a more efficient technique is direct memory access (DMA).
a. True
b. False
a. True
When using_______ technique, all write operations are made to main memory as well as to the cache, ensuring
that main memory is always valid.
A. write back
B. LRU
C. write through
D. unified cache
C. write through
Semiconductor memory comes in packaged chips.
A. True
B. False
A. True
Backward compatible means that the programs written for the older machines can be executed on the new machine.
a. True
b. False
a. True
The_ defines the third generation of computers.
A. integrated circuit
B. vacuum tube
C. transistor
D. VLSI
A. integrated circuit
Cache is not a form of internal memory.
A. True
B. False
B. False
The operand___yields true if and only if both of its operands are true.
A. XOR
B. OR
C. AND
D. NOT
C. A
Magnetic disks are the foundation of external memory on virtually all computer systems
A. True
B. False
A. True
The register file is on the same chip as the ALU and control unit.
A. True
B. False
A. True
With a batch operating system the user does not have direct access to the processor.
A. True
B. False
A. True
The end user is concerned mainly with the computer's architecture.
A. True
B. False
B. False
For _________, the address field references a main memory address and the referenced register contains a positive displacement from that address.
a. indexing
b. base-register addressing
c. relative addressing
d. all of the above
a. indexing
A _______ is an electronic circuit that produces an output signal that is a simple Boolean operation on its input signals.
a. gate
b. decoder
c. counter
d. flip-flop
a. gate
The register that keeps the address of next instruction to be executed is______
A. AC
B. PC
C. IR
D. MBR
E. MQ
B. PC
A static RAM will hold its data as long as power is supplied to it.
A. True
B. False
A. True
Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.
a. organization
b. specifics
c. design
d. architecture
d. architecture
A computer must be able to process, store, move, and control data.
A. True
B. False
A. True
The_____controls the movement of dala and instructions into and gut of the processor.
A. control unit
B. ALU
C. shifter
D. branch
A. control unit
In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size.
a. 64
b. 128
c. 256
d. 512
d. 512
The disadvantage of immediate addressing is that the size of the number is restricted to the : address field.
A. True
B. False
A. True
RAM must be provided with a constant power supply.
A. True
B. False
A. True
Techniques that automatically move program and data blocks into the physical main memor required for execution are called
A. Associative-Mapping techniques
B. Main Memory techniques
C. Virtual Memory techniques
D. Cache Memory techniques
E. Paging techniques
C. Virtual Memory techniques
A sequence of codes or instructions is called __________.
a. software
b. memory
c. an interconnect
d. a register
a. software
When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________.
a. multiple sided
b. substrate
c. double sided
d. all of the above
c. double sided
The __________ contains the 8-bit opcode instruction being executed.
a. memory buffer register
b. instruction buffer register
c. instruction register
d. memory address register
c. instruction register
Interrupts do not improve processing efficiency.
A. True
B. False
B. False
A characteristic of ROM is that it is volatile.
A. True
B. False
B. False
It is possible to improve pipeline performance by automatically rearranging instructions within a program so that branch instructions occur later than actually desired.
A. True
B. False
A. True
The most common means of computer/user interaction is a __________.
a. keyboard/monitor
b. mouse/printer
c. modem/printer
d. monitor/printer
a. keyboard/monitor
The unary operation _________ inverts the value of its operand.
a. OR
b. NOT
c. NAND
d. XOR
b. NOT
A set of I/O modules is a key element of a computer system.
a. True
b. False
a. True
The predict-never-taken approach is the most popular of all the branch prediction methods.
A. True
B. False
A. True
The __________ interprets the instructions in memory and causes them to be executed.
a. main memory
b. control unit
c. I/O
d. arithmetic and logic unit
b. control unit
Data are transferred to and from the disk in __________.
a. tracks
b. gaps
c. sectors
d. pits
c. sectors
The principal advantage of ___________ addressing is that it is a very simple form of addressing.
a. displacement
b. register
c. stack
d. direct
d. direct
An interrupt is a hardware-generated signal to the processor.
A. True
B. False
A. True
The___command is used to activate a peripheral and tell it what to do.
A. control
B. test
C. read
D. write
A. control
All DRAMs require a refresh operation.
A. True
B. False
A. True
There are typically hundreds of sectors per track and they may be either fixed or variable lengths.
a. True
b. False
a. True
The value of the mode field determines which addressing mode is to be used.
a. True
b. False
a. True
The l/O function includes a_____requirement to coordinate the gy, of traffic between
and external devices.
A. cycle
B. status reporting
C. control and timing
D. data
C. control and timing
In a system without virtual memory, the effective address is a virtual addrgss or a register.
A. True
B. False
B. False
Swapping is an i/O operation.
A. True
B. False
A. True
In a volatie memory, information decays naturally or is lost when electrigal power is switched
A. True
B. False
A. True
The System bus is made up of_________
A. Control bus
B. Address bus
C. Both Control bus and Address bus
D. Control bus, Data bus and Address bus
E. Data bus
D. Control bus, Data bus and Address bus
It is common for programs, both system and application, to continue to exhibit new bugs after years of operation.
a. True
b. False
a. True
Designers wrestle with the challenge of balancing processor performance with that of main memory and other computer components.
a. True
b. False
a. True
A computer has memory of 256k words, how many bits are required to spacify the address
A. 16 bits
B. 12 bits
C. 8 bits
D. 18 bits
E. 10 bits
D. 18 bits
In reference to access time to a two-level memory, a _________ occurs if an accessed word is not found in the faster memory.
a. miss
b. hit
c. line
d. tag
a. miss
External memory is often equated with main memory.
a. True
b. False
b. False
Cache memory is a much faster memory than the register file.
A. True
B. False
B. False
A __________ system is a set of interrelated subsystems.
a. secondary
b. hierarchical
c. complex
d. functional
b. hierarchical
The______is connected to the address lines of the system bus
A. MBR
B. MAR
C. PC
D. IR
B. MAR