Chapter 5: Hardware Realizations of Algorithms: Computer Systems Design

abstraction

removal of unimportant elements of a program or computer code that distract from its process

addressing mode

location in the memory that contains the required data

American Standard Code for Information Interchange (ASCII)

unit code or unique binary number

arithmetic logic unit (ALU)

piece of hardware inside the CPU that performs computations and logical operations such as comparisons

assembler

takes the assembly program that takes I/O that contains the equivalent of an assembly program

assembly language

low-level language that is designed to be computer friendly

bit

binary digit made up of 1 or 0

block

group of pages in flash memory

bus

data pathway

byte

8 bits

cache hit

data found in the cache needed by the processor

cache memory

memory that allows for high-speed retrieval of data

cache miss

when the cache is empty so it does not have the needed data

capacitor

very small electrical component that stores an electric charge

complex instruction set computer (CISC)

complex architecture structure that assists in executing such operations as mathematical computations and memory storage

disk

storage mechanism for data

dual in-line memory module (DIMM)

small memory board that contains several memory banks

dynamic library

collection of libraries that may be linked during execution or while the program is running

dynamic random access memory (DRAM)

consists of a large number of capacitors

executable

program stored inside a computer

flag

tells a program if a condition has been met

flash memory

type of nonvolatile storage that can be electronically erased and reprogrammed is called

floating point number (also, real number)

one with a decimal point in the middle

hard disk drive (HDD)

stores data on rotating platter, has a very large capacity, and uses a small motor to rotate platters to get the data

heap

stores dynamically allocated data

heterogeneous

design feature where CPUs are different in speed, power, or efficiency

high-level language (HLL)

most evolved method by which a human can direct a computer on how to perform tasks and applications

hit rate

number, usually a percentage, of times the cache was used to retrieve data

homogeneous

when CPUs are copies of each other in design

IEEE 754

standard format used by computers that support floating points with very few exceptions

input/output (I/O)

interface that helps the CPU talk to other I/O devices such as a keyboard or mouse

instruction set architecture (ISA)

set of instructions recognized by each processor family

label

variable name that we give to an assembly instruction

library

collection of files, functions, or scripts that are cited within a program’s code

loader

puts the executable into memory and arranges its content in a specific way to make it ready for execution by the processor

locality

when a processor repeatedly visits the same memory locales

logic gate

main building block that forms the processor

memory hierarchy

arrangement of storage available on a computer system usually in the form of a triangle

microarchitecture

architecture, or design, of the processor or microprocessor

NAND gate

type of logic gate used to store bits in flash memory

neuromorphic computer

nontraditional computer built to act like a simplified version of the brain

object code

designates output of the assembler

one’s complement

obtained by flipping each 1 in the original binary number to 0 and each 0 to 1

operand

value used as an input for an operator

operating system (OS)

only piece of software that can directly access the hardware

pipelining

technique where each piece of the process does the work needed by the following piece

processor

another name for the CPU

program counter (PC)

register that keeps track of instructions to be executed

pseudo-assembly

assembly instruction that does not have a counterpart in the machine code

random access memory (RAM)

allows the process to access any part of the memory in any order

reduced instruction set computer (RISC)

simple instructions

refresh cycle

regular operation that DRAM memory does by adding charges to memory cells in order to lose the data stored as charges

register

memory unit that functions at a very high speed

register file

group of registers

scheduling

when the OS manages which program to use with what part of the hardware at any given time

signed integer

integer that can be negative or positive (sign of + or –)

simultaneous multithreading (SMT)

when two or more programs execute on the processor at the same time

solid-state drive (SSD)

stores data on a chip and is two to three orders of magnitude faster than HDD

spatial locality

idea that if a program accesses data in a consecutive manner, it gets better performance

spatial parallelism

type of parallelism capability

stack

used to store local variables

static random access memory (SRAM)

keeps data in the computer’s memory as long as the machine is powered on

superscalar capability

execution unit that allows several instructions to be executed at the same time using spatial parallelism

temporal locality

reuses cached data to get better performance

temporal parallelism

allows for different pipeline phases to work on different instructions

transistor

lets an electric current pass (on state) or blocks it (off state)

translation layer

circuitry that controls the flash memory

two’s complement

one’s complement with 1 added

unsigned integer

non-negative integer that starts from 0

vector instructions

another set of instructions and another set of registers for floating points

virtual memory

technique the OS uses to isolate different programs from each other so they do not overwrite each other’s data or corrupt each other’s files