Contemporary processors, input and output devices and starage

What is a processor

Hardware than can execute instructions

What does a CPU do

Controls the execution of co puter programs

What are the components of a processor

ALU, CU, Register

What does a Control Unit do

Manages the activities in the processor

What are Registers

Small stores of memory in a processor

Name all the 5 special purpose registers and what they do

Program Counter (PC): Holds the address of the next instruction to be fetched

Current Instruction Register (CIR): Contains the instruction currently being executed.

Memory Address Register (MAR): Holds the address of the data to be fetched.

Memory Data Register (MDR): Contains the data that is being read from or fetched

Accumulator (ACC): Holds the result from an instruction

What is a bus

A collection of parallel lines that transmit data

Name the 3 types of buses and what they do

Address Bus: A unidirectional bus that transfers data from the CPU to the memory

Control Bus: A bidirectional bus that carries signals to and from the CPU, memory and other devices

Data Bus: A bi- directional bus that carries data to and from the CPU and memory

Explain the fetch cycle

The address in the PC is copied to the MAR then the PC is incremented

The MAR sends a read request along the control bus

The MAR sends the address stored in it to the memory along the address bus

The data is sent from memory to the CPU along the data bus and is stored in the MDR

The data in the MDR is then copied into the CIR

Explain the decode cycle

After the fetch cycle, the instruction in the CIR is interpreted by the control unit

It is split into opcode and operand which the control unit uses to determine what hardware is needed and if any additional data is required

Explain the Execute cycle

After the decode cycle, if additional is required, the address is copied to the MAR and another fetch cycle is performed until the data is stored in the MDR

If the instruction is an arithmetic or logical instruction, it is carried out by the ALU

If it a memory instruction, the MAR/MDR is used to read or write data

Then the result is stored in the accumulator

How is the performancew of a CPU measured

By how many Instructions it can execute in a given amount of time

What are the factors that affect a CPU performance

Clock speed, Number of cores, Cache size and pipelining

What is clock speed

Amount of clock cycles that a clock has per second

What is a CPU core

A processing unit that can execute instructions

What does a CPU core contain

AN ALU, CU, clock, cache

What is a cache

A small memory store that holds frequently accesed data

Ways cache can be used to increase CPU performance

Ensure that it holds the most frequently accessed data

Increase size

Explain the 3 levels of cache

Level 1: fastest, smallest

Level 2:slightly slower, slightly bigger

Level 3:Biggest and slowest but still faster than RAM

What happens when a CPU needs data from a cache

It checks level 1, if its not there it then checks level 2, if its no there it checks level 3 and if its not in any of these it gets it from the RAM

What is pipelining

This is when different instructions are processed concurrently

How does pipelining work

When one instruction is being executed, while another is being decoded and another is being fetched

What are the benefits of pipelining

Less idle time

More instructions being completed in a given time

What are the disadvantages of pipelining

Branching could create hazards

Instructions with slower execution time hold up the others which cause bottlenecks

Process could stall if different instruction require the same component

What does a CPU architecture focus on

The design of the system

What are the two types of CPU architectures

Von nuemann and harvard architecture

Describe the Von Nuemann architecture

One ALU, one control unit, registers and one storage unit

Describe the harvard architecture

One ALU, one control unit, registers and 2 storage units. One for instructions and one for data

Advantages of Von neumann architecture

Less complex, cheaper, uses fewer buses

Disadvantages of Von nuemann

Von nuemann bottlenecks

Advantages of Harvard architecture

No von nuemann bottlenecks

Faster execution time

More predictable timing

Disadvantages of Harvard architecture

More complex

More memory required

Why is Harvard used in real time systems

It guarantees predictable and consistent timing because instructions and data dont have to compete for the same bus or memory

What is an Instruction set and what does it do

A set of instructions it is able to perform ad it outlines opcode, operand and addresing modes would work

What is a RISC processor

A processor that aims to have a small instruction set with all instructions being used regularly

Features of a RISC processor

Each instruction performs a simple task

For complex tasks, multiple instructions need to be combined

Each instruction takes one clock cycle

The CPU hardware is simpler

What is a CISC processor

A processor that aims to have a larger instruction set with instructions covering a lot of different tasks

Features of a CISC processor

The CPU hardware is more complex

Different instructions take different lenghts of time to complete

Some instructions will cover multiple operations in one go

Benefits of a RISC processor

Cheaper to manufacure

Less power is needed to run it

Pipelining is easier since each instruction takes one clock cycle

Benefits of CISC processors

Translating from high level language to low level language is quicker and easier

Writing low level language is easier