CSE Project Misc Should Remember

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64 Terms

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Two-pass assembler (purpose)
Enable forward references by first resolving all symbol/literal addresses (pass 1) and then emitting machine code/object records (pass 2).
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Pass 1 (assembler) responsibilities
Compute segment info and addresses; build symbol table; identify literals; place literals; maintain a correct location counter (LC).
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Pass 2 (assembler) responsibilities
Form each instruction’s bits; replace symbols/literals with resolved addresses; write header, text, and end records to the object file.
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Location Counter (LC)
Address of the instruction or data currently being placed; initialized by .ORIG and advanced per instruction/pseudo-op length.
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Machine Op Table (MOT)
Map from mnemonic → opcode/format/size; constant during assembly; drives how much LC advances.
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Pseudo Op Table (POT)
Map from pseudo-op → length/format; constant; determines LC changes for directives like .FILL/.BLKW/.STRZ.
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Symbol table (assembler)
Map from label → value (address or constant); built in pass 1; queried in pass 2 to resolve operands.
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Literal table (assembler)
Map from literal token (=#… or =x…) → allocated address/value; identified in pass 1, placed at program end; referenced in pass 2.
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Restriction: .EQU symbol operand
Operand symbol must be previously defined (no forward ref); otherwise pass-1 invariants break.
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Restriction: .BLKW symbol operand
If .BLKW uses a symbol as its count, that symbol must be previously defined (no forward ref).
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Literal syntax (=#k/=xk) and idea
“=value” implicitly allocates a cell at program end, initializes it with the value, and uses its address in the instruction.
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Literal usage restrictions
Literals can substitute only PC-relative data operands (pgoffset fields); not allowed for branches, stores, or indirection; values must fit ranges.
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.ORIG (segment origin)
Set starting address for the segment and reset LC; contributes to header load address.
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.END (segment end/execution start)
Marks end of assembly and supplies the execution start address for the end record.
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.EQU (equate)
Defines a symbol to a constant value (e.g., HALT .EQU x25) used at assembly time.
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.FILL (numeric initializer)
Reserves one word and initializes it to a constant (decimal with #, hex with x, or symbol).
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.STRZ (string initializer)
Emits a NUL-terminated sequence of character codes into memory.
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.BLKW (storage allocation)
Reserves a block of uninitialized words for runtime use; footprint counted toward segment length.
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Accessing arrays/blocks efficiently
Use STR/LDR with a base register and small index to iterate over a .BLKW buffer.
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Object file: Header (H) fields
Segment name (6 chars), load address (4 hex), segment length (4 hex).
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Object file: Text (T) record fields
Target address (4 hex), 16-bit contents (4 hex) for that address.
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Object file: End (E) record field
Start execution address (4 hex) for the loader to jump to.
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Loader: gaps allowed
Not every address has a T record; uninitialized holes are valid inside the declared segment length.
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Assembly statement fields
Up to four: Label, Operation (mnemonic or pseudo-op), Operands, Comment; one statement per line.
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Testing (definition)
Observation-based process to increase confidence in an implementation; can show presence of bugs but never their absence.
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Testing mindset
Write tests to break code; a failing test is success because it exposed a defect you can fix.
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Specification vs implementation
Tests need a concrete spec (input→output contract) to judge correctness; “idea” alone is too fuzzy.
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Unit vs integration vs system tests
Unit: single component in isolation; Integration: combined modules and interfaces; System: end-to-end against requirements.
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Test independence principle
Each test must be independent (no order assumptions or side effects across tests); fixtures reset per test.
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JUnit fixtures (@BeforeEach)
Initialize shared state in a setup method so each test runs with a fresh, known-good fixture.
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Prefer assertEquals to assertTrue
assertEquals(expected, actual, msg) yields better diagnostics than generic boolean checks.
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Comparing floating-point results
Use equality with tolerance (delta) rather than exact equality to avoid numeric instability failures.
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Test-driven development (TDD)
Cycle: write failing test (red) → write minimum code to pass (green) → refactor while tests stay green.
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Independent testing benefit
Separate testers find more and earlier faults with less effort than developers testing their own code.
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Requirements analysis (what)
Define what the system should do from the user’s perspective; deliver a Requirements Document (scope contract).
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Specification (developer contract)
Precise, testable description from the developer’s perspective; basis for design, implementation, and testing.
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Design (how)
Architect the solution: decompose into components, choose data structures/algorithms, define interfaces and interactions.
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Module specification (interface vs impl)
Separate client-view behavior (what it guarantees) from implementer-view realization (how it’s built).
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Procedural vs OO design lenses
Procedural: functions transform data flows; OO: objects encapsulate state/behavior and collaborate via messages.
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CRC cards (purpose)
Brainstorm classes by capturing Class–Responsibilities–Collaborators on index cards; keep responsibilities small and clear.
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UML class diagram (use)
Model static structure: classes/interfaces and relationships (uses/implements/extends, multiplicities).
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UML sequence diagram (use)
Model dynamic behavior: objects over time and the messages between them during a scenario.
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Technical vs customer audience
Technical docs: exhaustive, function-oriented references; customer docs: task-oriented, concise “do X by steps” guides.
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“Start with the ask”
Open with a clear statement of purpose: what you want the reader to learn/decide/do.
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Prewriting → composition → revision
Treat documents like software: plan (prewrite), draft (compose), and iterate (review/revise).
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Outlining (why)
Locks in structure, prevents omissions, makes drafting faster; easiest high-ROI step to skip—don’t skip it.
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Component-based writing
Build documents from small, titled sections; enables milestones, time budgeting, and easier reorganization.
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Red flag: passive voice
Prefer active voice for clarity (“The parser issues this error” vs “This error is issued by the parser”).
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Red flag: wordiness
Be concise; extra words cost time and hide signal (“use” beats “utilize”).
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“Which” vs “that” rule
Use “that” for restrictive clauses and “which” for nonrestrictive ones; pick the simplest form that reads naturally.
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Transitions (examples)
Sequence (first/second), contrast (however), result (therefore), example (for example), conclude (in conclusion).
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Bloom’s revised levels
Remember → Understand → Apply → Analyze → Evaluate → Create; use appropriate action verbs in goals.
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Git repository parts
Working tree (files), Index (staging area), Store (.git history of objects/refs).
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HEAD and branches
HEAD usually points to a branch; a branch is a named ref to a commit; commits advance the current branch when attached.
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Clean vs dirty working tree
Clean: nothing to commit; dirty: working tree and/or index differ from last commit.
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add/commit staging model
`git add` copies changes to the index; `git commit` snapshots the index into a new commit.
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fetch vs pull vs push
Fetch: update local store with remote refs; Pull: fetch then merge; Push: advance remote refs with your commits.
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Fast-forward merge
When current tip is ancestor of target, Git moves the pointer without a merge commit.
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Stash and reset essentials
`git stash` saves dirty changes; `git reset --hard` discards uncommitted changes to match HEAD (dangerous).
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.gitignore purpose
Ignore generated/IDE/log files so they aren’t staged; keep repos clean and diffs meaningful.
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Text normalization (.gitattributes)
Define which files are text vs binary; normalize line endings to avoid noisy cross-OS diffs.
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Main is always deployable
Keep `main` releasable; do feature work on branches; integrate via review and tests.
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Project simulator: stop conditions
Interpreter runs until HALT or a simulator instruction-count time limit is reached; provide a sensible default limit.
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Project simulator: modes
Quiet (no interruptions), Trace (log before/each/after state), Step (trace with prompt between steps).