Computer Architecture and CPU Fundamentals

Flashcards covering key concepts from Computer Architecture focusing on CPU components, instruction cycles, addressing modes, computing types, control units, pipelining, and performance measurement.

What does CPU stand for?

Central Processing Unit

What does PC (Program Counter) store?

The next instruction’s address.

What does IR (Instruction Register) store?

The current fetched instruction.

What does MAR (Memory Address Register) store?

The memory address to access.

What does MBR (Memory Buffer Register) store?

The data/instruction being transferred to/from memory.

Which component performs arithmetic and logic operations?

ALU (Arithmetic Logic Unit).

In the Fetch step, what does the CPU usually do?

Copies the instruction into IR and increments PC.

What is the correct order of the main instruction cycle?

Fetch → Decode → Execute.

Which ICC value means Execute?

10.

What type of CPU organization uses two or three address fields in their instruction format?

General Register based CPU Organization.

What is the first of the four main CPU registers used in the instruction cycle?

PC – Program Counter.

Which is the second main CPU register used in the instruction cycle?

IR – Instruction Register.

What is the third main CPU register in the instruction cycle?

MAR – Memory Address Register.

What is the fourth main CPU register in the instruction cycle?

MBR/MDR – Memory Buffer Register / Memory Data Register.

What are the three main steps of the instruction cycle?

1. Fetch, 2. Decode, 3. Execute.

What does ICC (Instruction Cycle Code) with value 00 represent?

Fetch Cycle.

Describe the operation of 'Push' in stack actions.

Adds data to the top of the stack.

What does 'Pop' do in stack actions?

Removes data from the top of the stack.

What are the four types of instruction formats based on number of addresses?

Zero-address, One-address, Two-address, Three-address instructions.

Name the three main CPU organization types.

General Register based CPU Organization, Single Accumulator based CPU Organization, Stack-based CPU organization.

What addressing mode is used for inter segment transfer of control?

Base Register Addressing Mode.

In which mode is the operand’s offset placed in registers like BX, BP, SI, DI?

Register Indirect Mode.

What instruction is used to call a subroutine?

Call instruction.

What instruction is used to skip over rungs in PLC?

Jump instruction.

What is SIC?

Simplified Instructional Computer.

What process divides complex problems into smaller tasks processed simultaneously?

Parallel Computing.

What is the definition of computing?

A goal-oriented activity requiring, benefiting from, or creating computers.

What is distributed computing?

Multiple separate computers connected over a network working together on a single goal.

What is Amdahl's Law?

Describes the effects of a bottleneck on the potential speedup of a system.

What is sequential computing?

A model where tasks must be completed one after the other.

If a system has a bottleneck occupying 20% of execution time, what is the speedup with 4 additional processors?

1.19.

Calculate the overall speedup with Fraction Enhance 60% and Speedup Enhanced 4.

1.818.

What is the main function of the Control Unit (CU)?

Direct and coordinate operations of the CPU.

Which component helps the Control Unit determine operations to perform?

Instruction register.

What is a key characteristic of a Hardwired Control Unit?

Generates control signals using fixed hardware circuits.

In a microprogrammed control unit, what does opcode provide?

The address of the microprogram in control memory.

What is the main advantage of a two-level control store?

Reduces memory size by avoiding repeated control signals.

What is one disadvantage of a Micro-programmed Control Unit?

It is generally slower because it fetches microinstructions from control memory.

What is a Control Word in micro-programming?

A binary word where each bit represents a control signal.

What distinguishes Horizontal from Vertical Micro-programmed Control Units?

Horizontal represents each control signal with one bit.

What controls communication in synchronous data transfer?

A common clock signal.

In synchronous data transfer, what does data rate depend on?

Clock frequency and bits per clock cycle.

What is a disadvantage of synchronous data transfer?

A slow device can reduce overall system speed.

What are start and stop bits used for in asynchronous data transfer?

To indicate the beginning and end of data.

Why is asynchronous data transfer flexible?

Devices can operate at different speeds.

Where are control signals decoded in a horizontal micro-programmed control unit?

They are directly represented in the control word.

If a system has 64 control signals and 16 flags, what is the control word size in horizontal programming?

80 bits.

How many bits do 64 control signals require in vertical micro-programming?

6 bits.

Compared to vertical micro-programming, how does horizontal micro-programming differ?

It is generally faster and more flexible.

What is the primary function of pipelining in a CPU?

To allow for the simultaneous execution of more than one instruction.

What are the three primary ways to measure computer performance?

Response Time, Throughput, CPU Execution Time.

Name the three classifications of microprocessors.

RISC, CISC, EPIC.

What do we call the small basic actions performed inside the CPU?

Micro-operations.

Which component primarily determines instruction execution speed?

Processor Speed (measured in GHz).

What stage gets the instruction from memory?

Fetch.

What is the complete process of Fetch, Decode, Execute, and Interrupt called?

Instruction Cycle.

What are the three types of data hazards?

RAW, WAR, WAW.

What is a Uniform Delay Pipeline?

A type of pipeline where all stages take the same time to complete an operation.

What does 'Computer Performance' refer to?

The amount of work accomplished by a computer system.

What is a Microprocessor?

A processing unit on a single chip.

What dependency arises due to resource conflict in the pipeline?

Structural Dependency.

How many stages does a RISC processor have in its instruction pipeline?

5 stages.

What is a Stall in pipeline operations?

A cycle in the pipeline without new input.

What micro-operation moves data from a register back to memory?

Store.