EE 238 MODULE 5

is generally a three terminal device which could be used in applications wherein bipolar junction transistors are used.

FET

It is a _________ device as compared to a BJT which is a current controlled device.

voltage controlled device

The term_____ is used because for FETs, an electric field established by the carriers controls the conduction path of the output current without the need for direct contact between the input signal parameters and the output signal parameters.

Field Effect

It is a ____ device because current flow is only _____ on either electron flow (n channel) or hole flow (p channel).

Unpolar, Dependent

BJT is a _____ device because current flow is always dependent on electron flow (n material) and hole flow (p material).

Bipolar

FETs have very high ____ (1 Mohm to hundreds of Mohm or higher), because the p-n junction at the input is operated in the reverse biased condition (for JFET), the gate is insulated (for MOSFET), or the gate has a

Input impedance

Junction field effect transistor (JFET), which has two types:

N channel and P channel

Metal oxide semiconductor field effect transistor (MOSFET) also called Insulated Gate FET or IGFET, which has two types:

Depletion MOSFET (N channel or P channel) and Enhancement MOSFET (N channel or P channel)

Metal semiconductor field effect transistor (MESFET), which has two types:

Depletion MESFET (N channel or P channel) and Enhancement MESFET (N channel or P channel)

Commercial MESFETs are typically made up of?

N channel only because N channel MESFETs are faster compared to P channel MESFETs.

JFETs have three terminals:

Gate, Drain and the Source

is used to control the flow of current flowing through the drain and the source.

The Gate

is the same as the source current. Both currents flow through the channel of the FET.

The drain current

• The drain and the source are connected to both ends of

the n type material

The drain current and source current are

equal in value.

Drain and source current flows

through the channel

made up of two materials which are internally connected

The Gate is

The channel is sandwiched between

the two gate materials

If the depletion region increases in width, the width of the channel decreases, and

less current could flow through the channel, thus the drain and source current will be lower.

Decrease in width of the depletion region results to

higher drain current.

The width of the depletion region can be increased

by increasing the reverse bias voltage between the gate and the source and between the gate and the drain.

Thus the drain current and source current can be controlled by changing the

reverse bias voltage between the gate and the source and between the gate and the drain.

For an n-channel JFET - When voltage between the gate and source (VGS) is 0 volt, and the voltage between the drain and the source (VDS) is positive at the Drain, the following conditions exist:

Depletion region between the Gate and the Drain is wider than the depletion region between the Gate and the Source, because the p-n junction between the Drain and the Gate is more reverse biased than the p-n junction between the Gate and the Source.

Conventional current flows from Drain to Source through the channel, and the current is only

limited by the resistance of the n-channel between the drain and the source.

Drain current (ID ) is equal to

the Source current (IS )

When Drain to Source voltage (VDS) increases, Drain current (ID ) and Source current (IS )

also increase until VDS reaches the pinch off voltage (Vp), which is the pinch off voltage when VGS = 0 volt.

When VDS increases beyond VP , Drain current (ID ) does not increase and practically remains at a constant saturation level called IDSS

(Saturation Drain Current when VGS = 0).

When Drain to Source voltage (VDS) increases, Drain current (ID ) and Source current (IS ) also increase until VDS reaches the

pinch off voltage (Vp), which is the pinch off voltage when VGS = 0 volt.

the Drain to Source resistance is approaching an “infinite” value, as any increase in VDS

does not result in an increase in Drain current.

As the Drain to source voltage (VDS) increases beyond Vp, the region of close contact between the two depletion region

increases

– IDSS is the maximum Drain current (Source current also, ID=IS ) for the JFET when VGS = 0 volt and VDS > |VP |, as long as VDS does not reach

the breakdown voltage.

When VDS reaches the maximum allowed value (breakdown voltage – VDS max )

Drain current becomes very high and the FET could be damaged.

For low values of VDS (VDS < VP ) , resistance from drain to source is relatively

constant

Gate current (IG ) is practically equal to _____ because the p-n junctions are reverse biased.

Zero

– For p-channel JFET, the same conditions exist, except the polarity of the Drain to Source voltage (VDS) is ______, and the direction of the Drain current (IDS) is also ________.

Reversed

The Drain current is typically controlled by

varying the Gate to Source voltage (VGS).

When VGS is more negative than the Source (for n-channel) and the Drain to Source voltage (VDS) is positive at the Drain

Gate to Source voltage (VGS) is more reverse biased than when Gate to Source voltage is equal to zero.

The depletion region between the Gate and the Source is

wider than when the Gate to Source voltage (VGS) is equal to zero

As the Gate to Source voltage (VGS) becomes more negative at the Gate, the saturation level of the Drain current

decreases and saturation level occurs at lower values of VDS.

The characteristic curve of JFET has three regions which are

ohmic region, saturation region, and breakdown region.

Others call the saturation region as

beyond pinchoff region, constant current region, or linear amplification region.

Others include another region called cutoff region at which

drain current is equal to zero.