FLAGS

Program Status Register (PSR)

The register that holds the current machine state, including condition flags, execution mode, interrupt bits, and the Thumb state.

CPSR (ARM7TDMI)

The Current Program Status Register on ARM7TDMI, containing flags (N, Z, C, V), processor mode, interrupt bits, and the Thumb bit.

xPSR (Cortex-M4)

The combined status register on Cortex-M4 that includes condition flags, exception number, ICI bits, and the Thumb bit.

Condition Flags

Four bits (N, Z, C, V) stored in the uppermost nibble of the status register that control conditional execution of instructions.

N Flag (Negative Flag)

Set when the most significant bit (bit 31) of the result is 1, indicating a negative value in two’s complement representation.

Negative Number (Two’s Complement)

A value whose most significant bit is set to 1 in a two’s complement number system.

Important Caveat of the N Flag

Two positive numbers can add together and produce a result with the MSB set, causing the N flag to be set even though both operands were positive.

V Flag (Overflow Flag)

Indicates a signed overflow, meaning the result of an arithmetic operation cannot be represented in 32-bit two’s complement form.

Signed Overflow Condition

Occurs when the result of an addition or subtraction is ≥ 2³¹ or < −2³¹.

Calculated as the XOR of the carry into the most significant bit and the carry out of the most significant bit

How is the V Flag Computed?

S Suffix (Flag-Setting Instructions)

Appending S to an ALU instruction (e.g., ADDS, SUBS) causes the instruction to update the condition flags.

Z Flag (Zero Flag)

Set when the result of an operation is exactly zero (all 32 bits are zero).

Used in loops and counters to detect when a value reaches zero.

Common Use of the Z Flag

BNE (Branch if Not Equal)

A conditional branch instruction that jumps when the Z flag is clear (result ≠ 0).

Example Use of Z Flag in a Loop

A register is decremented using SUBS until it reaches zero; BNE repeats the loop while Z = 0.

C Flag (Carry Flag)

Set when an addition produces a result ≥ 2³², when a subtraction does not require a borrow, or due to a barrel shifter operation.

Carry Flag in Addition

Indicates an unsigned overflow where the result exceeds the 32-bit limit.

Carry Flag in Subtraction

Set when the result is positive; effectively represents “no borrow” due to inverted carry logic.

Carry Flag and Precision Arithmetic

Used to build higher-precision arithmetic, such as 64-bit addition or subtraction using multiple 32-bit operations.

Carry Flag and Shifts

Updated by inline barrel shifter operations in move and logical instructions.

Allows chaining arithmetic operations across multiple registers for extended precision calculations.

Why is the C Flag Useful?

Q Flag (Cortex-M4 Only)

Indicates that a value has saturated; governed by special rules and discussed separately from N, Z, C, and V.

Ways Flags Can Be Modified

• Dedicated flag-setting instructions (e.g., CMP, TST)

• ALU instructions with the S suffix

• Direct writes to the Program Status Register

• Certain 16-bit Thumb ALU instructions

CMP Instruction

Performs a subtraction internally to update flags without storing the result.

TST Instruction

Performs a bitwise AND internally to update flags without storing the result.

Signed vs Unsigned Interpretation of Flags

The same flag values can represent different meanings depending on whether numbers are treated as signed or unsigned.

Key Difference Between N and V Flags

N reflects the sign of the result, while V indicates whether a signed overflow occurred.