homework 3

Which network layer is responsible for multi-hop routing

A. Physical

B. Link

C. Transport

D. Network

D. Network

Which TWO columns are fundamental in a routing table?

A. Destination and Next Hop

B. Destination and MAC Address

C. Next Hop and Signal Strength

D. Queue Length and Interface MTU

A. Destination and Next Hop

In routing tables, what does reachability indicate?

A. The number of bytes queued on an interface

B. Whether a destination can be forwarded to via known next hops

C. The RSSI threshold needed to decode packets

D. The maximum TCP window size for a path

B. Whether a destination can be forwarded to via known next hops

What does Dijkstra’s algorithm compute on a weighted graph with nonnegative edges?

A. Minimum spanning tree

B. Shortest paths from a source

C. Maximum flow between two nodes

D. All simple cycles

B. Shortest paths from a source

Which data structure could be used to track the best-known distance to each node during Dijkstra’s execution?

A. A FIFO queue with distances

B. A String with name of each node

C. A dictionary with node:distance pairs

D. A Bloom filter used to compress distances

C. A dictionary with node:distance pairs

At each step, Dijkstra selects the next node to finalize based on which criterion?

A. Highest degree among neighboring nodes

B. Most neighbors discovered so far

C. Currently smallest tentative distance

D. Most recent arrival time of packets

C. Currently smallest tentative distance

After running Dijkstra toward destination A, intuitively, what does each node’s next hop entry represent?

A. The farthest node on any path

B. Which neighbor gets closest to A

C. The neighbor with the lowest queue

D. The neighbor with highest bandwidth

B. Which neighbor gets closest to A

What best describes an Instruction Set Architecture (ISA)?

A. The chip’s physical packaging layout

B. The set of instructions supported by the CPU

C. The compiler’s intermediate representation

D. The IP cores needed to build a System on Chip (SoC)

B. The set of instructions supported by the CPU

Which statement distinguishes CISC from RISC

A. CISC has more complex instructions; RISC uses simpler instructions

B. CISC instructions always consume less power than RISC instructions

C. RISC cannot support pipelining while CISC is designed for data pipelining

D. RISC cannot execute arithmetic operations while CISC can execute arithmetic operations

A. CISC has more complex instructions; RISC uses simpler instructions

Which pairing of device and CPU family is correct?

A. Arduino Uno R4 - x86-64

B. Raspberry Pi 5 - AVR

C. Raspberry Pi 5 - ARM-based SoC

D. Arduino Uno R4 - SPARC

C. Raspberry Pi 5 - ARM-based SoC

What is RISC-V?

A. A proprietary ARM MCU core

B. An open standard ISA

C. A GPU shading language

D. A PCB routing tool

B. An open standard ISA

Which best captures “memory hierarchy”?

A. Only DRAM and SSD devices in the system

B. Layered memory from registers, caches, DRAM, to storage

C. RAID-style striping applied across system RAM modules

D. Listing of process address spaces and their mappings

B. Layered memory from registers, caches, DRAM, to storage

What is a key difference between threads and processes?

A. Threads share an address space; processes have separate address spaces

B. Threads cannot run in parallel; processes can run in parallel

C. Processes cannot spawn children; Threads can spawn other threads

D. Threads cannot block on I/O; processes can block on I/O

A. Threads share an address space; processes have separate address spaces

Which describes a race condition?

A. Two CPUs run at the same clock speed on a synchronized hardware platform

B. Outcome depends on the timing of concurrent writes to shared state

C. The build uses a higher compiler optimization level than before

D. UDP traffic appears faster than TCP on a lightly loaded local network

B. Outcome depends on the timing of concurrent writes to shared state

What is a mutex used for?

A. Prioritizing and dispatching hardware interrupts

B. Enforcing mutual exclusion for a critical section

C. Counting and profiling processor clock cycles

D. Enabling copy-on-write access separate processes

B. Enforcing mutual exclusion for a critical section

What does a counting semaphore control?

A. Selection of the CPU voltage level

B. Configuration of the network MTU size

C. Access to a pool of N shared resources

D. Assignment of file access permissions

C. Access to a pool of N shared resources

How are message queues commonly used with threads?

A. To share thread stacks across tasks

B. To pass data safely between threads

C. To lock or pause the task scheduler

D. To allocate and manage process page tables

B. To pass data safely between threads

Which operating system is commonly used with ESP32 for multithreading?

A. Bare-metal loops only

B. Zephyr RTOS exclusively

C. Full Linux distro

D. FreeRTOS 

D. FreeRTOS 

What does a photoresistor or light-dependent resistor (LDR) do?

A. Generates a fixed voltage when illuminated

B. Changes resistance with incident light intensity

C. Stores photocharge like a capacitor only

D. Emits light proportional to current

B. Changes resistance with incident light intensity

What differentiates PTC and NTC thermistors?

A. NTC cannot be used in voltage dividers; PTC resistors work well for voltage dividers

B. Both have identical temperature coefficients

C. PTC is used primarily for cryogenic sensing; NTC is for high temperatures

D. PTC resistance rises with temperature; NTC resistance falls

D. PTC resistance rises with temperature; NTC resistance falls

What does an fNIRS sensor measure (at a high level)?

A. Carbon dioxide concentration levels in blood

B. Blood oxygenation via near-infrared light absorption

C. Electrical potentials on the scalp measured via ECG

D. Core body temperature

B. Blood oxygenation via near-infrared light absorption

Why is a sample-and-hold circuit needed before some ADCs?

A. To amplify the signal by 100x

B. To quantize directly at discrete times without a clock

C. To freeze input voltage for accurate conversion 

D. To reduce Electromagnetic Interference from the ADC

C. To freeze input voltage for accurate conversion 

Why does a counter-type ADC trade off resolution vs sampling rate?

A. Parallel comparators slow down as bit depth grows

B. More bits mean more count steps per conversion

C. Longer averaging due to oversampling filters used

D. Extra op-amps are required for higher bit counts

B. More bits mean more count steps per conversion

What is a netlist?

A. List of components and their connections

B. Photo of the printed circuit board

C. Diagram showing signal timing

D. Map showing IC temperature

A. List of components and their connections

What is SPICE primarily used for?

A. Planning PCB panel layouts

B. Modeling mechanical stresses

C. Flashing device firmware

D. Simulating electronic circuits

D. Simulating electronic circuits

What is a Gerber file?

A. Firmware binary for a microcontroller

B. Standard format for PCB layer data

C. Spreadsheet listing the bill of materials

D. Text-based SPICE circuit netlist file

B. Standard format for PCB layer data

What is an advantage of brushless DC (BLDC) motors over brushed DC?

A. No need for electronic commutation

B. Higher efficiency with lower upkeep

C. Always cheaper in every market

D. Cannot be controlled for speed

B. Higher efficiency with lower upkeep

What characterizes a stepper motor?

A. Free-spinning induction only

B. Uses brushes for commutation

C. No holding torque at standstill

D. Discrete steps for position

D. Discrete steps for position

How is a servo different from an open-loop stepper?

A. Servo runs open loop; stepper uses full feedback

B. Servo uses feedback to hold angle; stepper is open loop

C. Both are only continuous-rotation devices without position

D. Neither device can hold position under any load

B. Servo uses feedback to hold angle; stepper is open loop

How does a voltage follower isolate two circuit stages?

A. It doubles the voltage so the load draws less current

B. It prevents source current from flowing into the load path

C. It inverts the current to cancel the load demand

D. It rectifies the signal before the next stage receives it

B. It prevents source current from flowing into the load path

Why does an inverting summing amplifier configuration of an Op-Amp “sum” inputs?

A. KCL at virtual ground makes input currents add in feedback

B. The op-amp adds currents inside the chip and puts them at output

C. The amplifier saturates to whichever input is largest

D. The input nodes are directly shorted together before the amp

A. KCL at virtual ground makes input currents add in feedback

What does an ideal difference amplifier output?

A. The sum of the two input signals

B. Only the larger of the two inputs

C. A scaled difference of inputs

D. The time derivative of the inputs

C. A scaled difference of inputs

Which ADC type most commonly benefits from a stable input via S/H during conversion?

A. Comparator-type ADC

B. Counter-type ADCs

C. PWM-based ADC

D. None of the above

B. Counter-type ADCs