Operating Systems wk6

what is the CPU Instruction cycle

the process by which a CPU operates to execute program instructions

what is the four instructions in the instruction cycle

fetch

decode

execute

store

attributes of a L1 cache

the fastest and smallest, located inside the CPU core.

attributes of a L2 cache

larger but slower, still on the CPU chip.

attributes of a L3 cache

shared among cores, significantly larger but slower than L1 and L2.

what does a pair of base and limit registers do?

they define the logical address space.

what is the benefits of memory isolation

memory isolation

security enhancement

dynamic relocation

what is address binding

address binding transforms logical addresses into physical addresses.

what is a logical address

an abstract address that a process uses to access memory

what is a physical address

this refers to the acual location in the physical memory

what is the Memory Management Unit

a piece of hardware dedicated to mapping virtual to physical addresses.

whats the three different stages that address binding can happen

compile time

load time

execution time

what is Compile time binding

the compiler translates source code into machine code with absolute addresses.

what is load time binding

the loader calculates the absolute addresses when the program is loaded into memory

what is execution time binding

this allows processes to move freely between memory locations during execution, as logical addresses are dynamically translated to physical addresses.

what is standard swapping

a process may be swapped out of memory to a backing store, then brought back when needed

explain internal fragmentation

this occurs if processes are allocated slightly more than requested