Chapter 1: The Computer System — Vocabulary Flashcards

Vocabulary flashcards covering key terms from Chapter 1: The Computer System notes.

Input/output module (interface)

An interface between the system bus and an I/O bus that provides a systematic means for controlling interaction with external I/O devices and supplies the operating system with information needed to manage I/O activity.

Peripheral

External devices that communicate with the computer (e.g., printers, disks); typically electromechanical or electromagnetic, with data transfer rates usually slower than the CPU/memory.

Data register

Registers in an I/O module where data is buffered during transfer to/from the module.

Status register

Register that provides current status information and may also function as a control register to accept detailed control information from the processor.

Control lines

Signals used by the processor to issue commands to an I/O module.

I/O bus

Bus consisting of data lines, address lines, and control lines that connects the processor, I/O modules, and peripherals; uses an address decoder to select devices.

Address decoder

Circuit in an I/O interface that monitors the address lines to select the addressed device.

Serial interface

Interface that transmits data one line at a time; commonly used for printers/terminals and slower than parallel interfaces.

Parallel interface

Interface that transfers multiple bits simultaneously; traditionally used for higher-speed peripherals.

LPT

Parallel interface commonly associated with line printers; example of a parallel interface.

RS232C

Serial communication standard used for serial data transfer.

USB

Universal Serial Bus — a standard interface for connecting peripherals.

DMA

Direct Memory Access; a mechanism that transfers data directly between memory and I/O devices without CPU involvement.

DMA controller

Specialized processor that manages DMA transfers and provides DMA services to memory and I/O devices.

Interrupt-driven I/O

An I/O method where devices can interrupt the CPU to request service, improving throughput by avoiding constant polling; requires interrupt hardware.

Programmed I/O

An I/O method where the CPU polls I/O devices to check if they need service; synchronous operation that can reduce throughput with many devices.

FIFO

First In First Out buffer; a queue used to store data between producers and consumers to smooth transfers.

Fetch-decode-execute cycle

The basic operation cycle of a CPU: fetch the next instruction, decode it to determine meaning, and execute it, repeatedly for every instruction.

Program Counter (PC)

Register that holds the address of the next instruction to fetch.

Memory Address Register (MAR)

Register that holds the memory address to access during a memory operation.

Memory Data Register (MDR)

Register that holds the data being read from or written to memory.

Control Unit (CU)

Part of the CPU that decodes instructions and coordinates the operation of the CPU, ALU, and registers.

Arithmetic Logic Unit (ALU)

CPU unit that performs arithmetic and logic operations.

Accumulator

Register used to store intermediate results during calculations.